Lines Matching refs:True
17 NO_DEBUG_INFO_TESTCASE = True
58 error=True)
131 self.convenience_registers_with_process_attach(test_16bit_regs=True)
172 self.has_teardown = True
175 def write_and_read(self, frame, register, new_value, must_exist=True):
289 True, # stop at entry
326 (st0regname, "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00}", True))
330 True))
339 ("fpsr", "0xfbf79f9f", True),
340 ("s0", "1.25", True),
341 ("s31", "0.75", True),
342 ("d1", "123", True),
344 … ("v1", "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x2f 0x2f}", True),
353 ("fpsr", "0xfbf79f9f", True),
354 ("s0", "1.25", True),
355 ("s31", "0.75", True),
356 ("d1", "123", True),
358 … ("q1", "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x2f 0x2f}", True),
367 ("fpscr", "0xfbf79f9f", True),
368 ("s0", "1.25", True),
369 ("s31", "0.75", True),
370 ("d1", "123", True),
372 … ("q1", "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x2f 0x2f}", True),
417 error=True)
435 error=True)
443 self.expect("register read -a", matching=True,
489 self.expect("register read -a arg", error=True,
492 self.expect("register read --set 0 r", error=True,
495 self.expect("register write a", error=True,
497 self.expect("register write a b c", error=True,
506 self.expect("register write blub 1", error=True,