685       {"LB", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
687       {"LBE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
689       {"LBU", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
691       {"LBUE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
693       {"LDC1", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
695       {"LDL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
697       {"LDR", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
699       {"LLD", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
701       {"LDC2", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
705       {"LH", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
707       {"LHE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
709       {"LHU", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
711       {"LHUE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
713       {"LL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
715       {"LLE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
719       {"LW", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
721       {"LWC1", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
723       {"LWC2", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
725       {"LWE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
727       {"LWL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
729       {"LWLE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
731       {"LWR", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
733       {"LWRE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
738       {"SB", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
740       {"SBE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
742       {"SC", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
744       {"SCE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
746       {"SCD", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
748       {"SDL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
750       {"SDR", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
752       {"SDC1", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
754       {"SDC2", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
758       {"SH", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
760       {"SHE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
764       {"SW", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
766       {"SWC1", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
768       {"SWC2", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
770       {"SWE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
772       {"SWL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
774       {"SWLE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
776       {"SWR", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
778       {"SWRE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,  in GetOpcodeForInstruction()
2298 bool EmulateInstructionMIPS64::Emulate_LDST_Imm(llvm::MCInst &insn) {  in Emulate_LDST_Imm()  function in EmulateInstructionMIPS64