Lines Matching refs:setflags
1151 if setflags then in EmulateADDRdSPImm()
1212 if setflags then in EmulateMOVRdSP()
1274 if setflags then in EmulateMOVRdRm()
1287 bool setflags; in EmulateMOVRdRm() local
1292 setflags = false; in EmulateMOVRdRm()
1299 setflags = true; in EmulateMOVRdRm()
1306 setflags = BitIsSet(opcode, 20); in EmulateMOVRdRm()
1308 if (setflags && (BadReg(Rd) || BadReg(Rm))) in EmulateMOVRdRm()
1312 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13))) in EmulateMOVRdRm()
1318 setflags = BitIsSet(opcode, 20); in EmulateMOVRdRm()
1322 if (Rd == 15 && setflags) in EmulateMOVRdRm()
1344 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags)) in EmulateMOVRdRm()
1365 if setflags then in EmulateMOVRdImm()
1380 bool setflags; in EmulateMOVRdImm() local
1384 setflags = !InITBlock(); in EmulateMOVRdImm()
1392 setflags = BitIsSet(opcode, 20); in EmulateMOVRdImm()
1403 setflags = false; in EmulateMOVRdImm()
1419 setflags = BitIsSet(opcode, 20); in EmulateMOVRdImm()
1424 if ((Rd == 15) && setflags) in EmulateMOVRdImm()
1432 setflags = false; in EmulateMOVRdImm()
1452 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMOVRdImm()
1475 if setflags then in EmulateMUL()
1488 bool setflags; in EmulateMUL() local
1497 setflags = !InITBlock(); in EmulateMUL()
1510 setflags = false; in EmulateMUL()
1523 setflags = BitIsSet(opcode, 20); in EmulateMUL()
1573 if (setflags) { in EmulateMUL()
1607 if setflags then in EmulateMVNImm()
1619 bool setflags; in EmulateMVNImm() local
1623 setflags = BitIsSet(opcode, 20); in EmulateMVNImm()
1628 setflags = BitIsSet(opcode, 20); in EmulateMVNImm()
1633 if (Rd == 15 && setflags) in EmulateMVNImm()
1646 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNImm()
1668 if setflags then in EmulateMVNReg()
1681 bool setflags; in EmulateMVNReg() local
1687 setflags = !InITBlock(); in EmulateMVNReg()
1696 setflags = BitIsSet(opcode, 20); in EmulateMVNReg()
1705 setflags = BitIsSet(opcode, 20); in EmulateMVNReg()
1727 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNReg()
1836 if setflags then in EmulateADDSPImm()
1852 bool setflags; in EmulateADDSPImm() local
1858 setflags = false; in EmulateADDSPImm()
1865 setflags = false; in EmulateADDSPImm()
1873 setflags = Bit32(opcode, 20); in EmulateADDSPImm()
1876 if (d == 15 && setflags == 1) in EmulateADDSPImm()
1880 if (d == 15 && setflags == 0) in EmulateADDSPImm()
1888 setflags = false; in EmulateADDSPImm()
1925 if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags, in EmulateADDSPImm()
1948 if setflags then in EmulateADDSPRm()
2278 if setflags then in EmulateSUBR7IPImm()
2328 if setflags then in EmulateSUBIPSPImm()
2381 if setflags then in EmulateSUBSPImm()
2396 bool setflags; in EmulateSUBSPImm() local
2401 setflags = false; in EmulateSUBSPImm()
2406 setflags = BitIsSet(opcode, 20); in EmulateSUBSPImm()
2408 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2410 if (Rd == 15 && !setflags) in EmulateSUBSPImm()
2415 setflags = false; in EmulateSUBSPImm()
2422 setflags = BitIsSet(opcode, 20); in EmulateSUBSPImm()
2427 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2447 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBSPImm()
3017 if setflags then in EmulateADDImmThumb()
3029 bool setflags; in EmulateADDImmThumb() local
3040 setflags = !InITBlock(); in EmulateADDImmThumb()
3050 setflags = !InITBlock(); in EmulateADDImmThumb()
3061 setflags = BitIsSet(opcode, 20); in EmulateADDImmThumb()
3080 setflags = false; in EmulateADDImmThumb()
3122 if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags, in EmulateADDImmThumb()
3143 if setflags then in EmulateADDImmARM()
3156 bool setflags; in EmulateADDImmARM() local
3161 setflags = BitIsSet(opcode, 20); in EmulateADDImmARM()
3187 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDImmARM()
3209 if setflags then in EmulateADDReg()
3222 bool setflags; in EmulateADDReg() local
3228 setflags = !InITBlock(); in EmulateADDReg()
3235 setflags = false; in EmulateADDReg()
3247 setflags = BitIsSet(opcode, 20); in EmulateADDReg()
3277 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDReg()
3538 if setflags then in EmulateASRImm()
3562 if setflags then in EmulateASRReg()
3586 if setflags then in EmulateLSLImm()
3609 if setflags then in EmulateLSLReg()
3634 if setflags then in EmulateLSRImm()
3657 if setflags then in EmulateLSRReg()
3682 if setflags then in EmulateRORImm()
3706 if setflags then in EmulateRORReg()
3732 if setflags then in EmulateRRX()
3758 bool setflags; in EmulateShiftImm() local
3778 setflags = !InITBlock(); in EmulateShiftImm()
3789 setflags = BitIsSet(opcode, 20); in EmulateShiftImm()
3797 setflags = BitIsSet(opcode, 20); in EmulateShiftImm()
3826 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftImm()
3848 bool setflags; in EmulateShiftReg() local
3854 setflags = !InITBlock(); in EmulateShiftReg()
3860 setflags = BitIsSet(opcode, 20); in EmulateShiftReg()
3868 setflags = BitIsSet(opcode, 20); in EmulateShiftReg()
3897 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftReg()
5808 if setflags then in EmulateADCImm()
5821 bool setflags; in EmulateADCImm() local
5826 setflags = BitIsSet(opcode, 20); in EmulateADCImm()
5834 setflags = BitIsSet(opcode, 20); in EmulateADCImm()
5837 if (Rd == 15 && setflags) in EmulateADCImm()
5855 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCImm()
5878 if setflags then in EmulateADCReg()
5891 bool setflags; in EmulateADCReg() local
5896 setflags = !InITBlock(); in EmulateADCReg()
5904 setflags = BitIsSet(opcode, 20); in EmulateADCReg()
5913 setflags = BitIsSet(opcode, 20); in EmulateADCReg()
5916 if (Rd == 15 && setflags) in EmulateADCReg()
5942 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCReg()
6025 if setflags then in EmulateANDImm()
6038 bool setflags; in EmulateANDImm() local
6044 setflags = BitIsSet(opcode, 20); in EmulateANDImm()
6049 if (Rd == 15 && setflags) in EmulateANDImm()
6051 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateANDImm()
6057 setflags = BitIsSet(opcode, 20); in EmulateANDImm()
6062 if (Rd == 15 && setflags) in EmulateANDImm()
6080 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDImm()
6101 if setflags then in EmulateANDReg()
6114 bool setflags; in EmulateANDReg() local
6120 setflags = !InITBlock(); in EmulateANDReg()
6128 setflags = BitIsSet(opcode, 20); in EmulateANDReg()
6131 if (Rd == 15 && setflags) in EmulateANDReg()
6133 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateANDReg()
6140 setflags = BitIsSet(opcode, 20); in EmulateANDReg()
6143 if (Rd == 15 && setflags) in EmulateANDReg()
6169 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDReg()
6190 if setflags then in EmulateBICImm()
6203 bool setflags; in EmulateBICImm() local
6209 setflags = BitIsSet(opcode, 20); in EmulateBICImm()
6219 setflags = BitIsSet(opcode, 20); in EmulateBICImm()
6226 if (Rd == 15 && setflags) in EmulateBICImm()
6244 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICImm()
6266 if setflags then in EmulateBICReg()
6279 bool setflags; in EmulateBICReg() local
6285 setflags = !InITBlock(); in EmulateBICReg()
6293 setflags = BitIsSet(opcode, 20); in EmulateBICReg()
6302 setflags = BitIsSet(opcode, 20); in EmulateBICReg()
6307 if (Rd == 15 && setflags) in EmulateBICReg()
6333 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICReg()
8832 if setflags then in EmulateEORImm()
8845 bool setflags; in EmulateEORImm() local
8851 setflags = BitIsSet(opcode, 20); in EmulateEORImm()
8856 if (Rd == 15 && setflags) in EmulateEORImm()
8858 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateEORImm()
8864 setflags = BitIsSet(opcode, 20); in EmulateEORImm()
8871 if (Rd == 15 && setflags) in EmulateEORImm()
8889 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORImm()
8911 if setflags then in EmulateEORReg()
8924 bool setflags; in EmulateEORReg() local
8930 setflags = !InITBlock(); in EmulateEORReg()
8938 setflags = BitIsSet(opcode, 20); in EmulateEORReg()
8941 if (Rd == 15 && setflags) in EmulateEORReg()
8943 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateEORReg()
8950 setflags = BitIsSet(opcode, 20); in EmulateEORReg()
8955 if (Rd == 15 && setflags) in EmulateEORReg()
8981 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORReg()
9001 if setflags then in EmulateORRImm()
9014 bool setflags; in EmulateORRImm() local
9020 setflags = BitIsSet(opcode, 20); in EmulateORRImm()
9033 setflags = BitIsSet(opcode, 20); in EmulateORRImm()
9038 if (Rd == 15 && setflags) in EmulateORRImm()
9056 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRImm()
9078 if setflags then in EmulateORRReg()
9091 bool setflags; in EmulateORRReg() local
9097 setflags = !InITBlock(); in EmulateORRReg()
9105 setflags = BitIsSet(opcode, 20); in EmulateORRReg()
9117 setflags = BitIsSet(opcode, 20); in EmulateORRReg()
9120 if (Rd == 15 && setflags) in EmulateORRReg()
9146 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRReg()
9166 if setflags then in EmulateRSBImm()
9177 bool setflags; in EmulateRSBImm() local
9184 setflags = !InITBlock(); in EmulateRSBImm()
9190 setflags = BitIsSet(opcode, 20); in EmulateRSBImm()
9198 setflags = BitIsSet(opcode, 20); in EmulateRSBImm()
9203 if (Rd == 15 && setflags) in EmulateRSBImm()
9220 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBImm()
9239 if setflags then in EmulateRSBReg()
9251 bool setflags; in EmulateRSBReg() local
9259 setflags = BitIsSet(opcode, 20); in EmulateRSBReg()
9269 setflags = BitIsSet(opcode, 20); in EmulateRSBReg()
9274 if (Rd == 15 && setflags) in EmulateRSBReg()
9298 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBReg()
9317 if setflags then in EmulateRSCImm()
9328 bool setflags; in EmulateRSCImm() local
9335 setflags = BitIsSet(opcode, 20); in EmulateRSCImm()
9340 if (Rd == 15 && setflags) in EmulateRSCImm()
9357 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCImm()
9377 if setflags then in EmulateRSCReg()
9389 bool setflags; in EmulateRSCReg() local
9397 setflags = BitIsSet(opcode, 20); in EmulateRSCReg()
9402 if (Rd == 15 && setflags) in EmulateRSCReg()
9426 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCReg()
9446 if setflags then in EmulateSBCImm()
9457 bool setflags; in EmulateSBCImm() local
9464 setflags = BitIsSet(opcode, 20); in EmulateSBCImm()
9472 setflags = BitIsSet(opcode, 20); in EmulateSBCImm()
9477 if (Rd == 15 && setflags) in EmulateSBCImm()
9494 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCImm()
9515 if setflags then in EmulateSBCReg()
9527 bool setflags; in EmulateSBCReg() local
9534 setflags = !InITBlock(); in EmulateSBCReg()
9542 setflags = BitIsSet(opcode, 20); in EmulateSBCReg()
9551 setflags = BitIsSet(opcode, 20); in EmulateSBCReg()
9556 if (Rd == 15 && setflags) in EmulateSBCReg()
9580 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCReg()
9595 if setflags then in EmulateSUBImmThumb()
9606 bool setflags; in EmulateSUBImmThumb() local
9613 setflags = !InITBlock(); in EmulateSUBImmThumb()
9618 setflags = !InITBlock(); in EmulateSUBImmThumb()
9624 setflags = BitIsSet(opcode, 20); in EmulateSUBImmThumb()
9628 if (Rd == 15 && setflags) in EmulateSUBImmThumb()
9636 if (Rd == 13 || (Rd == 15 && !setflags) || Rn == 15) in EmulateSUBImmThumb()
9642 setflags = BitIsSet(opcode, 20); in EmulateSUBImmThumb()
9670 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmThumb()
9688 if setflags then in EmulateSUBImmARM()
9700 bool setflags; in EmulateSUBImmARM() local
9707 setflags = BitIsSet(opcode, 20); in EmulateSUBImmARM()
9711 if (Rn == 15 && !setflags) in EmulateSUBImmARM()
9720 if (Rd == 15 && setflags) in EmulateSUBImmARM()
9744 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmARM()
10019 if setflags then in EmulateSUBSPReg()
10031 bool setflags; in EmulateSUBSPReg() local
10040 setflags = BitIsSet(opcode, 20); in EmulateSUBSPReg()
10059 setflags = BitIsSet(opcode, 20); in EmulateSUBSPReg()
10063 if (d == 15 && setflags) in EmulateSUBSPReg()
10098 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags, in EmulateSUBSPReg()
10115 if setflags then in EmulateADDRegShift()
10129 bool setflags; in EmulateADDRegShift() local
10141 setflags = BitIsSet(opcode, 20); in EmulateADDRegShift()
10195 if (setflags) in EmulateADDRegShift()
10213 if setflags then in EmulateSUBReg()
10226 bool setflags; in EmulateSUBReg() local
10236 setflags = !InITBlock(); in EmulateSUBReg()
10249 setflags = BitIsSet(opcode, 20); in EmulateSUBReg()
10252 if (d == 15 && setflags == 1) in EmulateSUBReg()
10276 setflags = BitIsSet(opcode, 20); in EmulateSUBReg()
10280 if ((d == 15) && setflags) in EmulateSUBReg()
10325 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags, in EmulateSUBReg()
14246 Context &context, const uint32_t result, const uint32_t Rd, bool setflags, in WriteCoreRegOptionalFlags() argument
14269 if (setflags) in WriteCoreRegOptionalFlags()