1344     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags))  in EmulateMOVRdRm()
1452     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateMOVRdImm()
1646     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateMVNImm()
1727     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateMVNReg()
1925       if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags,  in EmulateADDSPImm()
2447     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateSUBSPImm()
3122     if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags,  in EmulateADDImmThumb()
3187     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateADDImmARM()
3277     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateADDReg()
3826     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateShiftImm()
3897     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateShiftReg()
5855     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateADCImm()
5942     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateADCReg()
6080     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateANDImm()
6169     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateANDReg()
6244     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateBICImm()
6333     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateBICReg()
8889     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateEORImm()
8981     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateEORReg()
9056     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateORRImm()
9146     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))  in EmulateORRReg()
9220   return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateRSBImm()
9298   return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateRSBReg()
9357   return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateRSCImm()
9426   return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateRSCReg()
9494   return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateSBCImm()
9580   return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateSBCReg()
9670   return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateSUBImmThumb()
9744     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,  in EmulateSUBImmARM()
10098     if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags,  in EmulateSUBSPReg()
10325     if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags,  in EmulateSUBReg()
14245 bool EmulateInstructionARM::WriteCoreRegOptionalFlags(  in WriteCoreRegOptionalFlags()  function in EmulateInstructionARM