Lines Matching refs:Rm
1285 uint32_t Rm; // the source register in EmulateMOVRdRm() local
1291 Rm = Bits32(opcode, 6, 3); in EmulateMOVRdRm()
1298 Rm = Bits32(opcode, 5, 3); in EmulateMOVRdRm()
1305 Rm = Bits32(opcode, 3, 0); in EmulateMOVRdRm()
1308 if (setflags && (BadReg(Rd) || BadReg(Rm))) in EmulateMOVRdRm()
1312 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13))) in EmulateMOVRdRm()
1317 Rm = Bits32(opcode, 3, 0); in EmulateMOVRdRm()
1328 uint32_t result = ReadCoreReg(Rm, &success); in EmulateMOVRdRm()
1336 else if (Rd == GetFramePointerRegisterNumber() && Rm == 13) in EmulateMOVRdRm()
1341 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, dwarf_reg); in EmulateMOVRdRm()
1677 uint32_t Rm; // the source register in EmulateMVNReg() local
1686 Rm = Bits32(opcode, 5, 3); in EmulateMVNReg()
1695 Rm = Bits32(opcode, 3, 0); in EmulateMVNReg()
1699 if (BadReg(Rd) || BadReg(Rm)) in EmulateMVNReg()
1704 Rm = Bits32(opcode, 3, 0); in EmulateMVNReg()
1712 uint32_t value = ReadCoreReg(Rm, &success); in EmulateMVNReg()
1962 uint32_t Rm; // the second operand in EmulateADDSPRm() local
1965 Rm = Bits32(opcode, 6, 3); in EmulateADDSPRm()
1970 int32_t reg_value = ReadCoreReg(Rm, &success); in EmulateADDSPRm()
1982 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, other_reg); in EmulateADDSPRm()
2127 uint32_t Rm; // the register with the target address in EmulateBLXRm() local
2131 Rm = Bits32(opcode, 6, 3); in EmulateBLXRm()
2133 if (Rm == 15) in EmulateBLXRm()
2140 Rm = Bits32(opcode, 3, 0); in EmulateBLXRm()
2142 if (Rm == 15) in EmulateBLXRm()
2148 addr_t target = ReadCoreReg(Rm, &success); in EmulateBLXRm()
2152 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, dwarf_reg); in EmulateBLXRm()
2179 uint32_t Rm; // the register with the target address in EmulateBXRm() local
2182 Rm = Bits32(opcode, 6, 3); in EmulateBXRm()
2187 Rm = Bits32(opcode, 3, 0); in EmulateBXRm()
2193 addr_t target = ReadCoreReg(Rm, &success); in EmulateBXRm()
2198 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, dwarf_reg); in EmulateBXRm()
2233 uint32_t Rm; // the register with the target address in EmulateBXJRm() local
2236 Rm = Bits32(opcode, 19, 16); in EmulateBXJRm()
2237 if (BadReg(Rm)) in EmulateBXJRm()
2243 Rm = Bits32(opcode, 3, 0); in EmulateBXJRm()
2244 if (Rm == 15) in EmulateBXJRm()
2251 addr_t target = ReadCoreReg(Rm, &success); in EmulateBXJRm()
2256 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, dwarf_reg); in EmulateBXJRm()
2953 uint32_t Rm; // the index register which contains an integer pointing to a in EmulateTB() local
2959 Rm = Bits32(opcode, 3, 0); in EmulateTB()
2961 if (Rn == 13 || BadReg(Rm)) in EmulateTB()
2977 uint32_t index = ReadCoreReg(Rm, &success); in EmulateTB()
3219 uint32_t Rd, Rn, Rm; in EmulateADDReg() local
3227 Rm = Bits32(opcode, 8, 6); in EmulateADDReg()
3234 Rm = Bits32(opcode, 6, 3); in EmulateADDReg()
3238 if (Rn == 15 && Rm == 15) in EmulateADDReg()
3246 Rm = Bits32(opcode, 3, 0); in EmulateADDReg()
3260 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateADDReg()
3274 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, op2_reg); in EmulateADDReg()
3350 uint32_t Rm; // the second operand in EmulateCMNReg() local
3356 Rm = Bits32(opcode, 5, 3); in EmulateCMNReg()
3362 Rm = Bits32(opcode, 3, 0); in EmulateCMNReg()
3365 if (Rn == 15 || BadReg(Rm)) in EmulateCMNReg()
3370 Rm = Bits32(opcode, 3, 0); in EmulateCMNReg()
3382 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateCMNReg()
3467 uint32_t Rm; // the second operand in EmulateCMPReg() local
3473 Rm = Bits32(opcode, 5, 3); in EmulateCMPReg()
3479 Rm = Bits32(opcode, 6, 3); in EmulateCMPReg()
3482 if (Rn < 8 && Rm < 8) in EmulateCMPReg()
3484 if (Rn == 15 || Rm == 15) in EmulateCMPReg()
3489 Rm = Bits32(opcode, 3, 0); in EmulateCMPReg()
3491 if (Rn == 15 || BadReg(Rm)) in EmulateCMPReg()
3496 Rm = Bits32(opcode, 3, 0); in EmulateCMPReg()
3508 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateCMPReg()
3755 uint32_t Rm; // the first operand register in EmulateShiftImm() local
3777 Rm = Bits32(opcode, 5, 3); in EmulateShiftImm()
3788 Rm = Bits32(opcode, 3, 0); in EmulateShiftImm()
3791 if (BadReg(Rd) || BadReg(Rm)) in EmulateShiftImm()
3796 Rm = Bits32(opcode, 3, 0); in EmulateShiftImm()
3809 uint32_t value = ReadCoreReg(Rm, &success); in EmulateShiftImm()
3846 Rm; // the register whose bottom byte contains the amount to shift by in EmulateShiftReg() local
3853 Rm = Bits32(opcode, 5, 3); in EmulateShiftReg()
3859 Rm = Bits32(opcode, 3, 0); in EmulateShiftReg()
3861 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateShiftReg()
3867 Rm = Bits32(opcode, 11, 8); in EmulateShiftReg()
3869 if (Rd == 15 || Rn == 15 || Rm == 15) in EmulateShiftReg()
3881 uint32_t val = ReadCoreReg(Rm, &success); in EmulateShiftReg()
5722 uint32_t Rm = ReadCoreReg(m, &success); in EmulateSTRHRegister() local
5731 uint32_t offset = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateSTRHRegister()
5888 uint32_t Rd, Rn, Rm; in EmulateADCReg() local
5895 Rm = Bits32(opcode, 5, 3); in EmulateADCReg()
5903 Rm = Bits32(opcode, 3, 0); in EmulateADCReg()
5906 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateADCReg()
5912 Rm = Bits32(opcode, 3, 0); in EmulateADCReg()
5929 int32_t val2 = ReadCoreReg(Rm, &success); in EmulateADCReg()
6111 uint32_t Rd, Rn, Rm; in EmulateANDReg() local
6119 Rm = Bits32(opcode, 5, 3); in EmulateANDReg()
6127 Rm = Bits32(opcode, 3, 0); in EmulateANDReg()
6133 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateANDReg()
6139 Rm = Bits32(opcode, 3, 0); in EmulateANDReg()
6156 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateANDReg()
6276 uint32_t Rd, Rn, Rm; in EmulateBICReg() local
6284 Rm = Bits32(opcode, 5, 3); in EmulateBICReg()
6292 Rm = Bits32(opcode, 3, 0); in EmulateBICReg()
6295 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateBICReg()
6301 Rm = Bits32(opcode, 3, 0); in EmulateBICReg()
6320 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateBICReg()
6592 uint32_t Rm = in EmulateLDRRegister() local
6608 Shift(Rm, shift_t, shift_n, Bit32(m_opcode_cpsr, APSR_C), &success); in EmulateLDRRegister()
7020 uint32_t Rm = in EmulateLDRBRegister() local
7025 addr_t offset = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateLDRBRegister()
7432 uint64_t Rm = in EmulateLDRHRegister() local
7437 addr_t offset = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateLDRHRegister()
7836 uint64_t Rm = in EmulateLDRSBRegister() local
7842 addr_t offset = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateLDRSBRegister()
8264 uint64_t Rm = in EmulateLDRSHRegister() local
8275 addr_t offset = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateLDRSHRegister()
8395 uint64_t Rm = in EmulateSXTB() local
8401 uint64_t rotated = ROR(Rm, rotation, &success); in EmulateSXTB()
8480 uint64_t Rm = in EmulateSXTH() local
8486 uint64_t rotated = ROR(Rm, rotation, &success); in EmulateSXTH()
8565 uint64_t Rm = in EmulateUXTB() local
8571 uint64_t rotated = ROR(Rm, rotation, &success); in EmulateUXTB()
8647 uint64_t Rm = in EmulateUXTH() local
8653 uint64_t rotated = ROR(Rm, rotation, &success); in EmulateUXTH()
8921 uint32_t Rd, Rn, Rm; in EmulateEORReg() local
8929 Rm = Bits32(opcode, 5, 3); in EmulateEORReg()
8937 Rm = Bits32(opcode, 3, 0); in EmulateEORReg()
8943 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateEORReg()
8949 Rm = Bits32(opcode, 3, 0); in EmulateEORReg()
8968 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateEORReg()
9088 uint32_t Rd, Rn, Rm; in EmulateORRReg() local
9096 Rm = Bits32(opcode, 5, 3); in EmulateORRReg()
9104 Rm = Bits32(opcode, 3, 0); in EmulateORRReg()
9110 if (BadReg(Rd) || Rn == 13 || BadReg(Rm)) in EmulateORRReg()
9116 Rm = Bits32(opcode, 3, 0); in EmulateORRReg()
9133 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateORRReg()
9250 uint32_t Rm; // the second operand in EmulateRSBReg() local
9258 Rm = Bits32(opcode, 3, 0); in EmulateRSBReg()
9262 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateRSBReg()
9268 Rm = Bits32(opcode, 3, 0); in EmulateRSBReg()
9286 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateRSBReg()
9388 uint32_t Rm; // the second operand in EmulateRSCReg() local
9396 Rm = Bits32(opcode, 3, 0); in EmulateRSCReg()
9414 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateRSCReg()
9526 uint32_t Rm; // the second operand in EmulateSBCReg() local
9533 Rm = Bits32(opcode, 5, 3); in EmulateSBCReg()
9541 Rm = Bits32(opcode, 3, 0); in EmulateSBCReg()
9544 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateSBCReg()
9550 Rm = Bits32(opcode, 3, 0); in EmulateSBCReg()
9568 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateSBCReg()
9830 uint32_t Rn, Rm; in EmulateTEQReg() local
9837 Rm = Bits32(opcode, 3, 0); in EmulateTEQReg()
9839 if (BadReg(Rn) || BadReg(Rm)) in EmulateTEQReg()
9844 Rm = Bits32(opcode, 3, 0); in EmulateTEQReg()
9857 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateTEQReg()
9955 uint32_t Rn, Rm; in EmulateTSTReg() local
9962 Rm = Bits32(opcode, 5, 3); in EmulateTSTReg()
9968 Rm = Bits32(opcode, 3, 0); in EmulateTSTReg()
9970 if (BadReg(Rn) || BadReg(Rm)) in EmulateTSTReg()
9975 Rm = Bits32(opcode, 3, 0); in EmulateTSTReg()
9988 uint32_t val2 = ReadCoreReg(Rm, &success); in EmulateTSTReg()
10075 uint32_t Rm = ReadCoreReg(m, &success); in EmulateSUBSPReg() local
10079 uint32_t shifted = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateSUBSPReg()
10161 uint32_t Rm = ReadCoreReg(m, &success); in EmulateADDRegShift() local
10165 uint32_t shifted = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateADDRegShift()
10293 uint32_t Rm = ReadCoreReg(m, &success); in EmulateSUBReg() local
10297 uint32_t shifted = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateSUBReg()
10863 uint32_t Rm = ReadCoreReg(m, &success); in EmulateLDRDRegister() local
10872 offset_addr = Rn + Rm; in EmulateLDRDRegister()
10874 offset_addr = Rn - Rm; in EmulateLDRDRegister()
11151 uint32_t Rm = ReadCoreReg(m, &success); in EmulateSTRDReg() local
11158 offset_addr = Rn + Rm; in EmulateSTRDReg()
11160 offset_addr = Rn - Rm; in EmulateSTRDReg()
11985 uint32_t Rm = ReadCoreReg(m, &success); in EmulateVLD1Multiple() local
11991 offset = Rm; in EmulateVLD1Multiple()
12152 uint32_t Rm = ReadCoreReg(m, &success); in EmulateVLD1Single() local
12158 offset = Rm; in EmulateVLD1Single()
12318 uint32_t Rm = ReadCoreReg(m, &success); in EmulateVST1Multiple() local
12324 offset = Rm; in EmulateVST1Multiple()
12485 uint32_t Rm = ReadCoreReg(m, &success); in EmulateVST1Single() local
12491 offset = Rm; in EmulateVST1Single()
12610 uint32_t Rm = ReadCoreReg(m, &success); in EmulateVLD1SingleAll() local
12616 offset = Rm; in EmulateVLD1SingleAll()
12736 uint32_t Rm = ReadCoreReg(m, &success); in EmulateSUBSPcLrEtc() local
12740 operand2 = Shift(Rm, shift_t, shift_n, APSR_C, &success); in EmulateSUBSPcLrEtc()