Lines Matching refs:Rd
1165 uint32_t Rd; // the destination register in EmulateADDRdSPImm() local
1169 Rd = 7; in EmulateADDRdSPImm()
1173 Rd = Bits32(opcode, 15, 12); in EmulateADDRdSPImm()
1183 if (Rd == GetFramePointerRegisterNumber()) in EmulateADDRdSPImm()
1191 if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, in EmulateADDRdSPImm()
1226 uint32_t Rd; // the destination register in EmulateMOVRdSP() local
1229 Rd = 7; in EmulateMOVRdSP()
1232 Rd = 12; in EmulateMOVRdSP()
1239 if (Rd == GetFramePointerRegisterNumber()) in EmulateMOVRdSP()
1247 if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, sp)) in EmulateMOVRdSP()
1286 uint32_t Rd; // the destination register in EmulateMOVRdRm() local
1290 Rd = Bit32(opcode, 7) << 3 | Bits32(opcode, 2, 0); in EmulateMOVRdRm()
1293 if (Rd == 15 && InITBlock() && !LastInITBlock()) in EmulateMOVRdRm()
1297 Rd = Bits32(opcode, 2, 0); in EmulateMOVRdRm()
1304 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdRm()
1308 if (setflags && (BadReg(Rd) || BadReg(Rm))) in EmulateMOVRdRm()
1312 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13))) in EmulateMOVRdRm()
1316 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdRm()
1322 if (Rd == 15 && setflags) in EmulateMOVRdRm()
1334 if (Rd == 13) in EmulateMOVRdRm()
1336 else if (Rd == GetFramePointerRegisterNumber() && Rm == 13) in EmulateMOVRdRm()
1344 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags)) in EmulateMOVRdRm()
1374 uint32_t Rd; // the destination register in EmulateMOVRdImm() local
1383 Rd = Bits32(opcode, 10, 8); in EmulateMOVRdImm()
1391 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdImm()
1394 if (BadReg(Rd)) in EmulateMOVRdImm()
1402 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdImm()
1411 if (BadReg(Rd)) in EmulateMOVRdImm()
1418 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdImm()
1424 if ((Rd == 15) && setflags) in EmulateMOVRdImm()
1431 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdImm()
1438 if (Rd == 15) in EmulateMOVRdImm()
1452 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMOVRdImm()
1616 uint32_t Rd; // the destination register in EmulateMVNImm() local
1622 Rd = Bits32(opcode, 11, 8); in EmulateMVNImm()
1627 Rd = Bits32(opcode, 15, 12); in EmulateMVNImm()
1633 if (Rd == 15 && setflags) in EmulateMVNImm()
1646 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNImm()
1678 uint32_t Rd; // the destination register in EmulateMVNReg() local
1685 Rd = Bits32(opcode, 2, 0); in EmulateMVNReg()
1694 Rd = Bits32(opcode, 11, 8); in EmulateMVNReg()
1699 if (BadReg(Rd) || BadReg(Rm)) in EmulateMVNReg()
1703 Rd = Bits32(opcode, 15, 12); in EmulateMVNReg()
1727 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNReg()
2395 uint32_t Rd; in EmulateSUBSPImm() local
2400 Rd = 13; in EmulateSUBSPImm()
2405 Rd = Bits32(opcode, 11, 8); in EmulateSUBSPImm()
2408 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2410 if (Rd == 15 && !setflags) in EmulateSUBSPImm()
2414 Rd = Bits32(opcode, 11, 8); in EmulateSUBSPImm()
2417 if (Rd == 15) in EmulateSUBSPImm()
2421 Rd = Bits32(opcode, 15, 12); in EmulateSUBSPImm()
2427 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2436 if (Rd == 13) { in EmulateSUBSPImm()
2447 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBSPImm()
3153 uint32_t Rd, Rn; in EmulateADDImmARM() local
3159 Rd = Bits32(opcode, 15, 12); in EmulateADDImmARM()
3176 if (Rd == 13) in EmulateADDImmARM()
3178 else if (Rd == GetFramePointerRegisterNumber()) in EmulateADDImmARM()
3187 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDImmARM()
3219 uint32_t Rd, Rn, Rm; in EmulateADDReg() local
3225 Rd = Bits32(opcode, 2, 0); in EmulateADDReg()
3233 Rd = Rn = Bit32(opcode, 7) << 3 | Bits32(opcode, 2, 0); in EmulateADDReg()
3240 if (Rd == 15 && InITBlock() && !LastInITBlock()) in EmulateADDReg()
3244 Rd = Bits32(opcode, 15, 12); in EmulateADDReg()
3277 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDReg()
3754 uint32_t Rd; // the destination register in EmulateShiftImm() local
3776 Rd = Bits32(opcode, 2, 0); in EmulateShiftImm()
3787 Rd = Bits32(opcode, 11, 8); in EmulateShiftImm()
3791 if (BadReg(Rd) || BadReg(Rm)) in EmulateShiftImm()
3795 Rd = Bits32(opcode, 15, 12); in EmulateShiftImm()
3826 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftImm()
3843 uint32_t Rd; // the destination register in EmulateShiftReg() local
3851 Rd = Bits32(opcode, 2, 0); in EmulateShiftReg()
3852 Rn = Rd; in EmulateShiftReg()
3857 Rd = Bits32(opcode, 11, 8); in EmulateShiftReg()
3861 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateShiftReg()
3865 Rd = Bits32(opcode, 15, 12); in EmulateShiftReg()
3869 if (Rd == 15 || Rn == 15 || Rm == 15) in EmulateShiftReg()
3897 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftReg()
5818 uint32_t Rd, Rn; in EmulateADCImm() local
5824 Rd = Bits32(opcode, 11, 8); in EmulateADCImm()
5828 if (BadReg(Rd) || BadReg(Rn)) in EmulateADCImm()
5832 Rd = Bits32(opcode, 15, 12); in EmulateADCImm()
5837 if (Rd == 15 && setflags) in EmulateADCImm()
5855 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCImm()
5888 uint32_t Rd, Rn, Rm; in EmulateADCReg() local
5894 Rd = Rn = Bits32(opcode, 2, 0); in EmulateADCReg()
5901 Rd = Bits32(opcode, 11, 8); in EmulateADCReg()
5906 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateADCReg()
5910 Rd = Bits32(opcode, 15, 12); in EmulateADCReg()
5916 if (Rd == 15 && setflags) in EmulateADCReg()
5942 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCReg()
5967 uint32_t Rd; in EmulateADR() local
5972 Rd = Bits32(opcode, 10, 8); in EmulateADR()
5978 Rd = Bits32(opcode, 11, 8); in EmulateADR()
5981 if (BadReg(Rd)) in EmulateADR()
5986 Rd = Bits32(opcode, 15, 12); in EmulateADR()
6005 if (!WriteCoreReg(context, result, Rd)) in EmulateADR()
6035 uint32_t Rd, Rn; in EmulateANDImm() local
6042 Rd = Bits32(opcode, 11, 8); in EmulateANDImm()
6049 if (Rd == 15 && setflags) in EmulateANDImm()
6051 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateANDImm()
6055 Rd = Bits32(opcode, 15, 12); in EmulateANDImm()
6062 if (Rd == 15 && setflags) in EmulateANDImm()
6080 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDImm()
6111 uint32_t Rd, Rn, Rm; in EmulateANDReg() local
6118 Rd = Rn = Bits32(opcode, 2, 0); in EmulateANDReg()
6125 Rd = Bits32(opcode, 11, 8); in EmulateANDReg()
6131 if (Rd == 15 && setflags) in EmulateANDReg()
6133 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateANDReg()
6137 Rd = Bits32(opcode, 15, 12); in EmulateANDReg()
6143 if (Rd == 15 && setflags) in EmulateANDReg()
6169 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDReg()
6200 uint32_t Rd, Rn; in EmulateBICImm() local
6207 Rd = Bits32(opcode, 11, 8); in EmulateBICImm()
6213 if (BadReg(Rd) || BadReg(Rn)) in EmulateBICImm()
6217 Rd = Bits32(opcode, 15, 12); in EmulateBICImm()
6226 if (Rd == 15 && setflags) in EmulateBICImm()
6244 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICImm()
6276 uint32_t Rd, Rn, Rm; in EmulateBICReg() local
6283 Rd = Rn = Bits32(opcode, 2, 0); in EmulateBICReg()
6290 Rd = Bits32(opcode, 11, 8); in EmulateBICReg()
6295 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateBICReg()
6299 Rd = Bits32(opcode, 15, 12); in EmulateBICReg()
6307 if (Rd == 15 && setflags) in EmulateBICReg()
6333 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICReg()
8842 uint32_t Rd, Rn; in EmulateEORImm() local
8849 Rd = Bits32(opcode, 11, 8); in EmulateEORImm()
8856 if (Rd == 15 && setflags) in EmulateEORImm()
8858 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateEORImm()
8862 Rd = Bits32(opcode, 15, 12); in EmulateEORImm()
8871 if (Rd == 15 && setflags) in EmulateEORImm()
8889 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORImm()
8921 uint32_t Rd, Rn, Rm; in EmulateEORReg() local
8928 Rd = Rn = Bits32(opcode, 2, 0); in EmulateEORReg()
8935 Rd = Bits32(opcode, 11, 8); in EmulateEORReg()
8941 if (Rd == 15 && setflags) in EmulateEORReg()
8943 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateEORReg()
8947 Rd = Bits32(opcode, 15, 12); in EmulateEORReg()
8955 if (Rd == 15 && setflags) in EmulateEORReg()
8981 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORReg()
9011 uint32_t Rd, Rn; in EmulateORRImm() local
9018 Rd = Bits32(opcode, 11, 8); in EmulateORRImm()
9027 if (BadReg(Rd) || Rn == 13) in EmulateORRImm()
9031 Rd = Bits32(opcode, 15, 12); in EmulateORRImm()
9038 if (Rd == 15 && setflags) in EmulateORRImm()
9056 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRImm()
9088 uint32_t Rd, Rn, Rm; in EmulateORRReg() local
9095 Rd = Rn = Bits32(opcode, 2, 0); in EmulateORRReg()
9102 Rd = Bits32(opcode, 11, 8); in EmulateORRReg()
9110 if (BadReg(Rd) || Rn == 13 || BadReg(Rm)) in EmulateORRReg()
9114 Rd = Bits32(opcode, 15, 12); in EmulateORRReg()
9120 if (Rd == 15 && setflags) in EmulateORRReg()
9146 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRReg()
9175 uint32_t Rd; // the destination register in EmulateRSBImm() local
9182 Rd = Bits32(opcode, 2, 0); in EmulateRSBImm()
9188 Rd = Bits32(opcode, 11, 8); in EmulateRSBImm()
9192 if (BadReg(Rd) || BadReg(Rn)) in EmulateRSBImm()
9196 Rd = Bits32(opcode, 15, 12); in EmulateRSBImm()
9203 if (Rd == 15 && setflags) in EmulateRSBImm()
9220 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBImm()
9248 uint32_t Rd; // the destination register in EmulateRSBReg() local
9256 Rd = Bits32(opcode, 11, 8); in EmulateRSBReg()
9262 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateRSBReg()
9266 Rd = Bits32(opcode, 15, 12); in EmulateRSBReg()
9274 if (Rd == 15 && setflags) in EmulateRSBReg()
9298 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBReg()
9326 uint32_t Rd; // the destination register in EmulateRSCImm() local
9333 Rd = Bits32(opcode, 15, 12); in EmulateRSCImm()
9340 if (Rd == 15 && setflags) in EmulateRSCImm()
9357 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCImm()
9386 uint32_t Rd; // the destination register in EmulateRSCReg() local
9394 Rd = Bits32(opcode, 15, 12); in EmulateRSCReg()
9402 if (Rd == 15 && setflags) in EmulateRSCReg()
9426 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCReg()
9455 uint32_t Rd; // the destination register in EmulateSBCImm() local
9462 Rd = Bits32(opcode, 11, 8); in EmulateSBCImm()
9466 if (BadReg(Rd) || BadReg(Rn)) in EmulateSBCImm()
9470 Rd = Bits32(opcode, 15, 12); in EmulateSBCImm()
9477 if (Rd == 15 && setflags) in EmulateSBCImm()
9494 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCImm()
9524 uint32_t Rd; // the destination register in EmulateSBCReg() local
9532 Rd = Rn = Bits32(opcode, 2, 0); in EmulateSBCReg()
9539 Rd = Bits32(opcode, 11, 8); in EmulateSBCReg()
9544 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateSBCReg()
9548 Rd = Bits32(opcode, 15, 12); in EmulateSBCReg()
9556 if (Rd == 15 && setflags) in EmulateSBCReg()
9580 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCReg()
9604 uint32_t Rd; // the destination register in EmulateSUBImmThumb() local
9611 Rd = Bits32(opcode, 2, 0); in EmulateSUBImmThumb()
9617 Rd = Rn = Bits32(opcode, 10, 8); in EmulateSUBImmThumb()
9622 Rd = Bits32(opcode, 11, 8); in EmulateSUBImmThumb()
9628 if (Rd == 15 && setflags) in EmulateSUBImmThumb()
9636 if (Rd == 13 || (Rd == 15 && !setflags) || Rn == 15) in EmulateSUBImmThumb()
9640 Rd = Bits32(opcode, 11, 8); in EmulateSUBImmThumb()
9653 if (BadReg(Rd)) in EmulateSUBImmThumb()
9670 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmThumb()
9698 uint32_t Rd; // the destination register in EmulateSUBImmARM() local
9705 Rd = Bits32(opcode, 15, 12); in EmulateSUBImmARM()
9720 if (Rd == 15 && setflags) in EmulateSUBImmARM()
9734 if (Rd == 13) in EmulateSUBImmARM()
9744 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmARM()
14246 Context &context, const uint32_t result, const uint32_t Rd, bool setflags, in WriteCoreRegOptionalFlags() argument
14248 if (Rd == 15) { in WriteCoreRegOptionalFlags()
14254 switch (Rd) { in WriteCoreRegOptionalFlags()
14265 reg_num = dwarf_r0 + Rd; in WriteCoreRegOptionalFlags()