Lines Matching refs:MemA

904                     MemA[address,4] = bits(32) UNKNOWN;  in EmulatePUSH()
906 MemA[address,4] = R[i]; in EmulatePUSH()
912 MemA[address,4] = PCStoreValue(); in EmulatePUSH()
1021 … R[i] = if UnalignedAllowed then MemU[address,4] else MemA[address,4]; address = address + 4; in EmulatePOP()
1026 LoadWritePC(MemA[address,4]); in EmulatePOP()
2560 MemA[address,4] = S[d+r]; address = address+4; in EmulateVPUSH()
2565 MemA[address,4] = if BigEndian() then D[d+r]<63:32> else D[d+r]<31:0>; in EmulateVPUSH()
2566 MemA[address+4,4] = if BigEndian() then D[d+r]<31:0> else D[d+r]<63:32>; in EmulateVPUSH()
2653 S[d+r] = MemA[address,4]; address = address+4; in EmulateVPOP()
2656 word1 = MemA[address,4]; word2 = MemA[address+4,4]; address = address+8; in EmulateVPOP()
3916 R[i] = MemA[address, 4]; address = address + 4; in EmulateLDM()
3918 LoadWritePC (MemA[address, 4]); in EmulateLDM()
4059 R[i] = MemA[address,4]; address = address + 4; in EmulateLDMDA()
4062 LoadWritePC(MemA[address,4]); in EmulateLDMDA()
4176 R[i] = MemA[address,4]; address = address + 4; in EmulateLDMDB()
4178 LoadWritePC(MemA[address,4]); in EmulateLDMDB()
4314 R[i] = MemA[address,4]; address = address + 4; in EmulateLDMIB()
4316 LoadWritePC(MemA[address,4]); in EmulateLDMIB()
4590 MemA[address,4] = bits(32) UNKNOWN; // Only possible for encodings T1 and A1 in EmulateSTM()
4592 MemA[address,4] = R[i]; in EmulateSTM()
4596 MemA[address,4] = PCStoreValue(); in EmulateSTM()
4742 MemA[address,4] = bits(32) UNKNOWN; in EmulateSTMDA()
4744 MemA[address,4] = R[i]; in EmulateSTMDA()
4748 MemA[address,4] = PCStoreValue(); in EmulateSTMDA()
4864 MemA[address,4] = bits(32) UNKNOWN; // Only possible for encoding A1 in EmulateSTMDB()
4866 MemA[address,4] = R[i]; in EmulateSTMDB()
4870 MemA[address,4] = PCStoreValue(); in EmulateSTMDB()
5013 MemA[address,4] = bits(32) UNKNOWN; in EmulateSTMIB()
5015 MemA[address,4] = R[i]; in EmulateSTMIB()
5019 MemA[address,4] = PCStoreValue(); in EmulateSTMIB()
8685 CPSRWriteByInstr(MemA[address+4,4], '1111', TRUE); in EmulateRFE()
8686 BranchWritePC(MemA[address,4]); in EmulateRFE()
10343 MemA[address,4] = R[t]; in EmulateSTREX()
10656 R[t] = MemA[address,4]; in EmulateLDRDImmediate()
10657 R[t2] = MemA[address+4,4]; in EmulateLDRDImmediate()
10804 R[t] = MemA[address,4]; in EmulateLDRDRegister()
10805 R[t2] = MemA[address+4,4]; in EmulateLDRDRegister()
10933 MemA[address,4] = R[t]; in EmulateSTRDImm()
10934 MemA[address+4,4] = R[t2]; in EmulateSTRDImm()
11086 MemA[address,4] = R[t]; in EmulateSTRDReg()
11087 MemA[address+4,4] = R[t2]; in EmulateSTRDReg()
11226 S[d+r] = MemA[address,4]; address = address+4; in EmulateVLDM()
11228 word1 = MemA[address,4]; word2 = MemA[address+4,4]; address = address+8; in EmulateVLDM()
11419 MemA[address,4] = S[d+r]; address = address+4; in EmulateVSTM()
11423 MemA[address,4] = if BigEndian() then D[d+r]<63:32> else D[d+r]<31:0>; in EmulateVSTM()
11424 MemA[address+4,4] = if BigEndian() then D[d+r]<31:0> else D[d+r]<63:32>; in EmulateVSTM()
11623 S[d] = MemA[address,4]; in EmulateVLDR()
11625 word1 = MemA[address,4]; word2 = MemA[address+4,4]; in EmulateVLDR()
11749 MemA[address,4] = S[d]; in EmulateVSTR()
11753 MemA[address,4] = if BigEndian() then D[d]<63:32> else D[d]<31:0>; in EmulateVSTR()
11754 MemA[address+4,4] = if BigEndian() then D[d]<31:0> else D[d]<63:32>; in EmulateVSTR()