Lines Matching refs:LoadWritePC
1024 LoadWritePC(MemU[address,4]); in EmulatePOP()
1026 LoadWritePC(MemA[address,4]); in EmulatePOP()
1122 if (!LoadWritePC(context, data)) in EmulatePOP()
1747 if address<1:0> == '00' then LoadWritePC(data); else UNPREDICTABLE; in EmulateLDRRtPCRelative()
1808 if (!LoadWritePC(context, data)) in EmulateLDRRtPCRelative()
3918 LoadWritePC (MemA[address, 4]); in EmulateLDM()
4023 if (!LoadWritePC(context, data)) in EmulateLDM()
4062 LoadWritePC(MemA[address,4]); in EmulateLDMDA()
4136 if (!LoadWritePC(context, data)) in EmulateLDMDA()
4178 LoadWritePC(MemA[address,4]); in EmulateLDMDB()
4274 if (!LoadWritePC(context, data)) in EmulateLDMDB()
4316 LoadWritePC(MemA[address,4]); in EmulateLDMIB()
4388 if (!LoadWritePC(context, data)) in EmulateLDMIB()
4429 if address<1:0> == '00' then LoadWritePC(data); else UNPREDICTABLE; in EmulateLDRRtRnImm()
4561 if (!LoadWritePC(context, data)) in EmulateLDRRtRnImm()
6353 if address<1:0> == '00' then LoadWritePC(data); else UNPREDICTABLE; in EmulateLDRImmediateARM()
6446 LoadWritePC(context, data); in EmulateLDRImmediateARM()
6491 if address<1:0> == '00' then LoadWritePC(data); else UNPREDICTABLE; in EmulateLDRRegister()
6651 LoadWritePC(context, data); in EmulateLDRRegister()
14110 bool EmulateInstructionARM::LoadWritePC(Context &context, uint32_t addr) { in LoadWritePC() function in EmulateInstructionARM