Lines Matching refs:Style
22 unsigned Length, const FormatStyle &Style) { in format() argument
26 tooling::Replacements Replaces = reformat(Style, Code, Ranges); in format()
35 const FormatStyle &Style = getLLVMStyle(FormatStyle::LK_Verilog)) { in format() argument
36 return format(Code, 0, Code.size(), Style); in format()
41 const FormatStyle &Style = getLLVMStyle(FormatStyle::LK_Verilog)) { in verifyFormat() argument
42 EXPECT_EQ(Code.str(), format(Code, Style)) << "Expected code is not stable"; in verifyFormat()
44 format(test::messUp(Code, /*HandleHash=*/false), Style)); in verifyFormat()
143 auto Style = getLLVMStyle(FormatStyle::LK_Verilog); in TEST_F() local
144 Style.ColumnLimit = 20; in TEST_F()
150 format("`define X if(x)x=x;", Style)); in TEST_F()
154 format("`define X(x) if(x)x=x;", Style)); in TEST_F()
158 format("`define X x=x;x=x;", Style)); in TEST_F()
166 Style)); in TEST_F()
173 Style)); in TEST_F()
177 format("`define LIST `x=`x;`x=`x;", Style)); in TEST_F()
214 Style)); in TEST_F()
224 Style)); in TEST_F()
231 Style)); in TEST_F()
246 Style)); in TEST_F()