Lines Matching refs:V0
20 // ARM64: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[T]] to i8**
21 // ARM64: call void @__default_constructor_8_w8(i8** %[[V0]])
29 // ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8
30 // ARM64: %[[V1]] = bitcast i8** %[[V0]] to i8*
39 // ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8
40 // ARM64: %[[V1:.*]] = bitcast i8** %[[V0]] to i8*
62 // ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8
64 // ARM64: %[[V2:.*]] = bitcast i8** %[[V0]] to i32*
68 // ARM64: %[[V5:.*]] = bitcast i8** %[[V0]] to i8*
88 // ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8
90 // ARM64: %[[V2:.*]] = bitcast i8** %[[V0]] to i32*
94 // ARM64: %[[V5:.*]] = bitcast i8** %[[V0]] to i8*
116 // ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8
118 // ARM64: %[[V2:.*]] = bitcast i8** %[[V0]] to i32*
122 // ARM64: %[[V5:.*]] = bitcast i8** %[[V0]] to i8*
143 // ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8
145 // ARM64: %[[V2:.*]] = bitcast i8** %[[V0]] to i32*
149 // ARM64: %[[V5:.*]] = bitcast i8** %[[V0]] to i8*
165 // COMMON: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[A]] to i8**
166 // COMMON: call void @__destructor_{{.*}}(i8** %[[V0]])
175 // COMMON: %[[V0:.*]] = load %[[STRUCT_WEAK]]*, %[[STRUCT_WEAK]]** %[[A_ADDR]]
177 // COMMON: %[[V2:.*]] = bitcast %[[STRUCT_WEAK]]* %[[V0]] to i8**
189 // COMMON: %[[V0:.*]] = load %[[STRUCT_WEAK]]*, %[[STRUCT_WEAK]]** %[[A_ADDR]]
191 // COMMON: %[[V2:.*]] = bitcast %[[STRUCT_WEAK]]* %[[V0]] to i8**