Lines Matching refs:RSP
903 case X86::RSP: case X86::ESP: case X86::SP: case X86::SPL: in getAliasSized()
905 case 8: return X86::RSP; case 4: return X86::ESP; in getAliasSized()
1045 StackPtrReg = X86::RSP; in isStackAccess()
1067 StackPtrReg = X86::RSP; in isStackAccess()
1130 if (BaseRegNum != X86::RBP && BaseRegNum != X86::RSP) in isStackAccess()
1204 if (BaseRegNum != X86::RBP && BaseRegNum != X86::RSP) { in changeToPushOrPop()
1271 if (Operand.isReg() && Operand.getReg() == X86::RSP) in isStackAdjustment()
1367 MCPhysReg getStackPointer() const override { return X86::RSP; } in getStackPointer()
1376 static BitVector SPBPAliases(BitVector(getAliases(X86::RSP)) |= in escapesVariable()
1378 static BitVector SPAliases(getAliases(X86::RSP)); in escapesVariable()
2379 Inst.addOperand(MCOperand::createReg(X86::RSP)); in createStackPointerIncrement()
2380 Inst.addOperand(MCOperand::createReg(X86::RSP)); // BaseReg in createStackPointerIncrement()
2389 Inst.addOperand(MCOperand::createReg(X86::RSP)); in createStackPointerIncrement()
2390 Inst.addOperand(MCOperand::createReg(X86::RSP)); in createStackPointerIncrement()
2400 Inst.addOperand(MCOperand::createReg(X86::RSP)); in createStackPointerDecrement()
2401 Inst.addOperand(MCOperand::createReg(X86::RSP)); // BaseReg in createStackPointerDecrement()
2410 Inst.addOperand(MCOperand::createReg(X86::RSP)); in createStackPointerDecrement()
2411 Inst.addOperand(MCOperand::createReg(X86::RSP)); in createStackPointerDecrement()
3250 static BitVector SPAliases(getAliases(X86::RSP)); in createInstrumentedIndirectCall()
3320 createSwap(Insts[3], TempReg, X86::RSP, 0); in createInstrumentedIndCallHandlerExitBB()
3321 createIndirectBranch(Insts[4], X86::RSP, -8); in createInstrumentedIndCallHandlerExitBB()
3337 createIndirectBranch(Insts[3], X86::RSP, -16); in createInstrumentedIndTailCallHandlerExitBB()