327       ErrorOr<const FrameIndexEntry &> FIEX = FA.getFIEFor(Inst);  in classifyStackAccesses()  local
328       if (!FIEX) {  in classifyStackAccesses()
332       if (!FIEX->IsSimple || (FIEX->IsStore && !FIEX->IsStoreFromReg)) {  in classifyStackAccesses()
333         blacklistRegion(FIEX->StackOffset, FIEX->Size);  in classifyStackAccesses()
340       if (SRU.isStoreUsed(*FIEX,  in classifyStackAccesses()
343         blacklistRegion(FIEX->StackOffset, FIEX->Size);  in classifyStackAccesses()
349       if (isRegionBlacklisted(FIEX->StackOffset, FIEX->Size) ||  in classifyStackAccesses()
350           blacklistAllInConflictWith(FIEX->StackOffset, FIEX->Size)) {  in classifyStackAccesses()
356       AvailableRegions[FIEX->StackOffset] = FIEX->Size;  in classifyStackAccesses()
357       BC.MIB->addAnnotation(Inst, getSlotTag(), FIEX->StackOffset, AllocatorId);  in classifyStackAccesses()
358       RegionToRegMap[FIEX->StackOffset].insert(FIEX->RegOrImm);  in classifyStackAccesses()
359       RegToRegionMap[FIEX->RegOrImm].insert(FIEX->StackOffset);  in classifyStackAccesses()
360       LLVM_DEBUG(dbgs() << "Adding region " << FIEX->StackOffset << " size "  in classifyStackAccesses()
361                         << (int)FIEX->Size << "\n");  in classifyStackAccesses()