Lines Matching refs:R4
43 #define R4 BPF_REG_4 macro
673 i += __bpf_ld_imm64(&insn[i], R4, val); in __bpf_fill_alu_shift()
674 insn[i++] = BPF_JMP_REG(BPF_JEQ, R1, R4, 1); in __bpf_fill_alu_shift()
1642 i += __bpf_ld_imm64(&insns[i], R4, fetch); in __bpf_emit_atomic64()
1652 insns[i++] = BPF_JMP_REG(BPF_JEQ, R2, R4, 1); in __bpf_emit_atomic64()
1689 i += __bpf_ld_imm64(&insns[i], R4, fetch); in __bpf_emit_atomic32()
1699 insns[i++] = BPF_JMP_REG(BPF_JEQ, R2, R4, 1); in __bpf_emit_atomic32()
3802 BPF_ALU64_IMM(BPF_MOV, R4, 4),
3812 BPF_ALU64_IMM(BPF_ADD, R4, 20),
3822 BPF_ALU64_IMM(BPF_SUB, R4, 10),
3832 BPF_ALU64_REG(BPF_ADD, R0, R4),
3844 BPF_ALU64_REG(BPF_ADD, R1, R4),
3856 BPF_ALU64_REG(BPF_ADD, R2, R4),
3868 BPF_ALU64_REG(BPF_ADD, R3, R4),
3876 BPF_ALU64_REG(BPF_ADD, R4, R0),
3877 BPF_ALU64_REG(BPF_ADD, R4, R1),
3878 BPF_ALU64_REG(BPF_ADD, R4, R2),
3879 BPF_ALU64_REG(BPF_ADD, R4, R3),
3880 BPF_ALU64_REG(BPF_ADD, R4, R4),
3881 BPF_ALU64_REG(BPF_ADD, R4, R5),
3882 BPF_ALU64_REG(BPF_ADD, R4, R6),
3883 BPF_ALU64_REG(BPF_ADD, R4, R7),
3884 BPF_ALU64_REG(BPF_ADD, R4, R8),
3885 BPF_ALU64_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
3886 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
3892 BPF_ALU64_REG(BPF_ADD, R5, R4),
3904 BPF_ALU64_REG(BPF_ADD, R6, R4),
3916 BPF_ALU64_REG(BPF_ADD, R7, R4),
3928 BPF_ALU64_REG(BPF_ADD, R8, R4),
3940 BPF_ALU64_REG(BPF_ADD, R9, R4),
3960 BPF_ALU32_IMM(BPF_MOV, R4, 4),
3969 BPF_ALU64_IMM(BPF_ADD, R4, 10),
3978 BPF_ALU32_REG(BPF_ADD, R0, R4),
3990 BPF_ALU32_REG(BPF_ADD, R1, R4),
4002 BPF_ALU32_REG(BPF_ADD, R2, R4),
4014 BPF_ALU32_REG(BPF_ADD, R3, R4),
4022 BPF_ALU32_REG(BPF_ADD, R4, R0),
4023 BPF_ALU32_REG(BPF_ADD, R4, R1),
4024 BPF_ALU32_REG(BPF_ADD, R4, R2),
4025 BPF_ALU32_REG(BPF_ADD, R4, R3),
4026 BPF_ALU32_REG(BPF_ADD, R4, R4),
4027 BPF_ALU32_REG(BPF_ADD, R4, R5),
4028 BPF_ALU32_REG(BPF_ADD, R4, R6),
4029 BPF_ALU32_REG(BPF_ADD, R4, R7),
4030 BPF_ALU32_REG(BPF_ADD, R4, R8),
4031 BPF_ALU32_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
4032 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
4038 BPF_ALU32_REG(BPF_ADD, R5, R4),
4050 BPF_ALU32_REG(BPF_ADD, R6, R4),
4062 BPF_ALU32_REG(BPF_ADD, R7, R4),
4074 BPF_ALU32_REG(BPF_ADD, R8, R4),
4086 BPF_ALU32_REG(BPF_ADD, R9, R4),
4106 BPF_ALU64_IMM(BPF_MOV, R4, 4),
4116 BPF_ALU64_REG(BPF_SUB, R0, R4),
4128 BPF_ALU64_REG(BPF_SUB, R1, R4),
4138 BPF_ALU64_REG(BPF_SUB, R2, R4),
4148 BPF_ALU64_REG(BPF_SUB, R3, R4),
4155 BPF_ALU64_REG(BPF_SUB, R4, R0),
4156 BPF_ALU64_REG(BPF_SUB, R4, R1),
4157 BPF_ALU64_REG(BPF_SUB, R4, R2),
4158 BPF_ALU64_REG(BPF_SUB, R4, R3),
4159 BPF_ALU64_REG(BPF_SUB, R4, R5),
4160 BPF_ALU64_REG(BPF_SUB, R4, R6),
4161 BPF_ALU64_REG(BPF_SUB, R4, R7),
4162 BPF_ALU64_REG(BPF_SUB, R4, R8),
4163 BPF_ALU64_REG(BPF_SUB, R4, R9),
4164 BPF_ALU64_IMM(BPF_SUB, R4, 10),
4169 BPF_ALU64_REG(BPF_SUB, R5, R4),
4179 BPF_ALU64_REG(BPF_SUB, R6, R4),
4189 BPF_ALU64_REG(BPF_SUB, R7, R4),
4199 BPF_ALU64_REG(BPF_SUB, R8, R4),
4209 BPF_ALU64_REG(BPF_SUB, R9, R4),
4220 BPF_ALU64_REG(BPF_SUB, R0, R4),
4252 BPF_ALU64_REG(BPF_XOR, R4, R4),
4255 BPF_JMP_REG(BPF_JEQ, R3, R4, 1),
4257 BPF_ALU64_REG(BPF_SUB, R4, R4),
4261 BPF_JMP_REG(BPF_JEQ, R5, R4, 1),
4305 BPF_ALU64_IMM(BPF_MOV, R4, 4),
4315 BPF_ALU64_REG(BPF_MUL, R0, R4),
4327 BPF_ALU64_REG(BPF_MUL, R1, R4),
4345 BPF_ALU64_REG(BPF_MUL, R2, R4),
4367 BPF_MOV64_REG(R4, R3),
4368 BPF_MOV64_REG(R5, R4),
4377 BPF_ALU64_IMM(BPF_MOV, R4, 0),
4387 BPF_ALU64_REG(BPF_ADD, R0, R4),
4407 BPF_MOV64_REG(R4, R3),
4408 BPF_MOV64_REG(R5, R4),
4417 BPF_ALU32_IMM(BPF_MOV, R4, 0),
4427 BPF_ALU64_REG(BPF_ADD, R0, R4),
4447 BPF_MOV64_REG(R4, R3),
4448 BPF_MOV64_REG(R5, R4),
4457 BPF_LD_IMM64(R4, 0x0LL),
4467 BPF_ALU64_REG(BPF_ADD, R0, R4),
4510 BPF_MOV32_IMM(R4, -1234),
4511 BPF_JMP_REG(BPF_JEQ, R0, R4, 1),
4513 BPF_ALU64_IMM(BPF_AND, R4, 63),
4514 BPF_ALU64_REG(BPF_LSH, R0, R4), /* R0 <= 46 */
4520 BPF_ALU64_REG(BPF_LSH, R4, R2), /* R4 = 46 << 1 */
4521 BPF_JMP_IMM(BPF_JEQ, R4, 92, 1),
4523 BPF_MOV64_IMM(R4, 4),
4524 BPF_ALU64_REG(BPF_LSH, R4, R4), /* R4 = 4 << 4 */
4525 BPF_JMP_IMM(BPF_JEQ, R4, 64, 1),
4527 BPF_MOV64_IMM(R4, 5),
4528 BPF_ALU32_REG(BPF_LSH, R4, R4), /* R4 = 5 << 5 */
4529 BPF_JMP_IMM(BPF_JEQ, R4, 160, 1),
5982 BPF_LD_IMM64(R4, 0xffffffffffffffffLL),
5984 BPF_ALU64_REG(BPF_DIV, R2, R4),
11798 BPF_ALU32_IMM(BPF_MOV, R4, 0xfefb0000),
11802 BPF_JMP_REG(BPF_JNE, R2, R4, 1),
11942 BPF_ALU64_IMM(BPF_MOV, R4, R4), \
11954 BPF_JMP_IMM(BPF_JNE, R4, R4, 6), \
12068 BPF_ALU64_IMM(BPF_MOV, R4, 4), \
12082 BPF_JMP_IMM(BPF_JNE, R4, 4, 6), \