205 		vga_wcrt(par->state.vgabase, DDC_REG, val);  in s3fb_ddc_write()
652 	vga_wcrt(par->state.vgabase, 0x38, 0x48);  in s3fb_set_par()
653 	vga_wcrt(par->state.vgabase, 0x39, 0xA5);  in s3fb_set_par()
696 		vga_wcrt(par->state.vgabase, 0x54, 0x18); /* M parameter */  in s3fb_set_par()
697 		vga_wcrt(par->state.vgabase, 0x60, 0xff); /* N parameter */  in s3fb_set_par()
698 		vga_wcrt(par->state.vgabase, 0x61, 0xff); /* L parameter */  in s3fb_set_par()
699 		vga_wcrt(par->state.vgabase, 0x62, 0xff); /* L parameter */  in s3fb_set_par()
702 	vga_wcrt(par->state.vgabase, 0x3A, 0x35);  in s3fb_set_par()
724 		vga_wcrt(par->state.vgabase, 0x86, 0x80);  in s3fb_set_par()
725 		vga_wcrt(par->state.vgabase, 0x90, 0x00);  in s3fb_set_par()
730 		vga_wcrt(par->state.vgabase, 0x50, 0x00);  in s3fb_set_par()
731 		vga_wcrt(par->state.vgabase, 0x67, 0x50);  in s3fb_set_par()
733 		vga_wcrt(par->state.vgabase, 0x63, (mode <= 2) ? 0x90 : 0x09);  in s3fb_set_par()
734 		vga_wcrt(par->state.vgabase, 0x66, 0x90);  in s3fb_set_par()
747 		vga_wcrt(par->state.vgabase, 0x91, (dbytes + 7) / 8);  in s3fb_set_par()
748 		vga_wcrt(par->state.vgabase, 0x90, (((dbytes + 7) / 8) >> 8) | 0x80);  in s3fb_set_par()
750 		vga_wcrt(par->state.vgabase, 0x66, 0x81);  in s3fb_set_par()
759 		vga_wcrt(par->state.vgabase, 0x34, 0x00);  in s3fb_set_par()
761 		vga_wcrt(par->state.vgabase, 0x34, 0x10);  in s3fb_set_par()
907 	vga_wcrt(par->state.vgabase, 0x3C, (htotal + 1) / 2);  in s3fb_set_par()
1196 	vga_wcrt(par->state.vgabase, 0x38, 0x48);  in s3_pci_probe()
1197 	vga_wcrt(par->state.vgabase, 0x39, 0xA5);  in s3_pci_probe()
1269 	vga_wcrt(par->state.vgabase, 0x38, cr38);  in s3_pci_probe()
1270 	vga_wcrt(par->state.vgabase, 0x39, cr39);  in s3_pci_probe()