69 	struct kmb_drm_private *kmb;  in check_pixel_format()  local
75 	kmb = to_kmb(plane->dev);  in check_pixel_format()
76 	init_disp_cfg = kmb->init_disp_cfg[plane_id];  in check_pixel_format()
81 		drm_dbg(&kmb->drm, "Cannot change format after initial plane configuration");  in check_pixel_format()
96 	struct kmb_drm_private *kmb;  in kmb_plane_atomic_check()  local
105 	kmb = to_kmb(plane->dev);  in kmb_plane_atomic_check()
106 	init_disp_cfg = kmb->init_disp_cfg[plane_id];  in kmb_plane_atomic_check()
127 		drm_dbg(&kmb->drm, "Cannot change plane height or width after initial configuration");  in kmb_plane_atomic_check()
146 	struct kmb_drm_private *kmb;  in kmb_plane_atomic_disable()  local
148 	kmb = to_kmb(plane->dev);  in kmb_plane_atomic_disable()
155 		kmb->plane_status[plane_id].ctrl = LCD_CTRL_VL1_ENABLE;  in kmb_plane_atomic_disable()
158 		kmb->plane_status[plane_id].ctrl = LCD_CTRL_VL2_ENABLE;  in kmb_plane_atomic_disable()
162 	kmb->plane_status[plane_id].disable = true;  in kmb_plane_atomic_disable()
286 static void config_csc(struct kmb_drm_private *kmb, int plane_id)  in config_csc()  argument
289 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF11(plane_id), csc_coef_lcd[0]);  in config_csc()
290 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF12(plane_id), csc_coef_lcd[1]);  in config_csc()
291 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF13(plane_id), csc_coef_lcd[2]);  in config_csc()
292 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF21(plane_id), csc_coef_lcd[3]);  in config_csc()
293 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF22(plane_id), csc_coef_lcd[4]);  in config_csc()
294 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF23(plane_id), csc_coef_lcd[5]);  in config_csc()
295 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF31(plane_id), csc_coef_lcd[6]);  in config_csc()
296 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF32(plane_id), csc_coef_lcd[7]);  in config_csc()
297 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_COEFF33(plane_id), csc_coef_lcd[8]);  in config_csc()
298 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_OFF1(plane_id), csc_coef_lcd[9]);  in config_csc()
299 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_OFF2(plane_id), csc_coef_lcd[10]);  in config_csc()
300 	kmb_write_lcd(kmb, LCD_LAYERn_CSC_OFF3(plane_id), csc_coef_lcd[11]);  in config_csc()
303 static void kmb_plane_set_alpha(struct kmb_drm_private *kmb,  in kmb_plane_set_alpha()  argument
338 	kmb_write_lcd(kmb, LCD_LAYERn_ALPHA(plane_id), plane_alpha);  in kmb_plane_set_alpha()
349 	struct kmb_drm_private *kmb;  in kmb_plane_atomic_update()  local
372 	kmb = to_kmb(plane->dev);  in kmb_plane_atomic_update()
375 	spin_lock_irq(&kmb->irq_lock);  in kmb_plane_atomic_update()
376 	if (kmb->kmb_under_flow || kmb->kmb_flush_done) {  in kmb_plane_atomic_update()
377 		spin_unlock_irq(&kmb->irq_lock);  in kmb_plane_atomic_update()
378 		drm_dbg(&kmb->drm, "plane_update:underflow!!!! returning");  in kmb_plane_atomic_update()
381 	spin_unlock_irq(&kmb->irq_lock);  in kmb_plane_atomic_update()
383 	init_disp_cfg = &kmb->init_disp_cfg[plane_id];  in kmb_plane_atomic_update()
389 	drm_dbg(&kmb->drm,  in kmb_plane_atomic_update()
396 	drm_dbg(&kmb->drm, "dma_len=%d ", dma_len);  in kmb_plane_atomic_update()
397 	kmb_write_lcd(kmb, LCD_LAYERn_DMA_LEN(plane_id), dma_len);  in kmb_plane_atomic_update()
398 	kmb_write_lcd(kmb, LCD_LAYERn_DMA_LEN_SHADOW(plane_id), dma_len);  in kmb_plane_atomic_update()
399 	kmb_write_lcd(kmb, LCD_LAYERn_DMA_LINE_VSTRIDE(plane_id),  in kmb_plane_atomic_update()
401 	kmb_write_lcd(kmb, LCD_LAYERn_DMA_LINE_WIDTH(plane_id),  in kmb_plane_atomic_update()
405 	kmb_write_lcd(kmb, LCD_LAYERn_DMA_START_ADDR(plane_id),  in kmb_plane_atomic_update()
411 		kmb_write_lcd(kmb, LCD_LAYERn_DMA_CB_LINE_VSTRIDE(plane_id),  in kmb_plane_atomic_update()
413 		kmb_write_lcd(kmb, LCD_LAYERn_DMA_CB_LINE_WIDTH(plane_id),  in kmb_plane_atomic_update()
420 			kmb_write_lcd(kmb,  in kmb_plane_atomic_update()
424 			kmb_write_lcd(kmb,  in kmb_plane_atomic_update()
429 			kmb_write_lcd(kmb,  in kmb_plane_atomic_update()
433 			kmb_write_lcd(kmb,  in kmb_plane_atomic_update()
443 				kmb_write_lcd(kmb,  in kmb_plane_atomic_update()
447 				kmb_write_lcd(kmb,  in kmb_plane_atomic_update()
453 	kmb_write_lcd(kmb, LCD_LAYERn_WIDTH(plane_id), src_w - 1);  in kmb_plane_atomic_update()
454 	kmb_write_lcd(kmb, LCD_LAYERn_HEIGHT(plane_id), src_h - 1);  in kmb_plane_atomic_update()
455 	kmb_write_lcd(kmb, LCD_LAYERn_COL_START(plane_id), crtc_x);  in kmb_plane_atomic_update()
456 	kmb_write_lcd(kmb, LCD_LAYERn_ROW_START(plane_id), crtc_y);  in kmb_plane_atomic_update()
464 		config_csc(kmb, plane_id);  in kmb_plane_atomic_update()
467 	kmb_plane_set_alpha(kmb, plane->state, plane_id, &val);  in kmb_plane_atomic_update()
469 	kmb_write_lcd(kmb, LCD_LAYERn_CFG(plane_id), val);  in kmb_plane_atomic_update()
472 	ctrl = kmb_read_lcd(kmb, LCD_CONTROL);  in kmb_plane_atomic_update()
504 	kmb_write_lcd(kmb, LCD_CONTROL, ctrl);  in kmb_plane_atomic_update()
510 	kmb_set_bitmask_lcd(kmb, LCD_CONTROL, LCD_CTRL_PIPELINE_DMA);  in kmb_plane_atomic_update()
520 	kmb_write_lcd(kmb, LCD_OUT_FORMAT_CFG, out_format);  in kmb_plane_atomic_update()
526 	kmb_write_lcd(kmb, LCD_LAYERn_DMA_CFG(plane_id), dma_cfg);  in kmb_plane_atomic_update()
537 	drm_dbg(&kmb->drm, "dma_cfg=0x%x LCD_DMA_CFG=0x%x\n", dma_cfg,  in kmb_plane_atomic_update()
538 		kmb_read_lcd(kmb, LCD_LAYERn_DMA_CFG(plane_id)));  in kmb_plane_atomic_update()
540 	kmb_set_bitmask_lcd(kmb, LCD_INT_CLEAR, LCD_INT_EOF |  in kmb_plane_atomic_update()
542 	kmb_set_bitmask_lcd(kmb, LCD_INT_ENABLE, LCD_INT_EOF |  in kmb_plane_atomic_update()
571 	struct kmb_drm_private *kmb = to_kmb(drm);  in kmb_plane_init()  local
625 			kmb->plane = plane;  in kmb_plane_init()
635 	kmb_clr_bitmask_lcd(kmb, LCD_CONTROL, LCD_CTRL_PIPELINE_DMA);  in kmb_plane_init()