37 		((adev)->powerplay.pp_funcs->enable_bapm((adev)->powerplay.pp_handle, (e)))
39 #define amdgpu_dpm_is_legacy_dpm(adev) ((adev)->powerplay.pp_handle == (adev))
43 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_sclk()
50 	ret = pp_funcs->get_sclk((adev)->powerplay.pp_handle,  in amdgpu_dpm_get_sclk()
59 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_mclk()
66 	ret = pp_funcs->get_mclk((adev)->powerplay.pp_handle,  in amdgpu_dpm_get_mclk()
79 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_powergating_by_smu()
103 				(adev)->powerplay.pp_handle, block_type, gate, 0));  in amdgpu_dpm_set_powergating_by_smu()
108 				(adev)->powerplay.pp_handle, block_type, gate, inst));  in amdgpu_dpm_set_powergating_by_smu()
124 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_set_gfx_power_up_by_imu()
138 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_baco_enter()
139 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_baco_enter()
157 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_baco_exit()
158 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_baco_exit()
178 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_mp1_state()
188 				adev->powerplay.pp_handle,  in amdgpu_dpm_set_mp1_state()
200 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_notify_rlc_state()
206 				adev->powerplay.pp_handle,  in amdgpu_dpm_notify_rlc_state()
217 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_is_baco_supported()
218 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_is_baco_supported()
246 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_mode2_reset()
247 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_mode2_reset()
264 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_enable_gfx_features()
265 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_enable_gfx_features()
282 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_baco_reset()
283 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_baco_reset()
306 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_is_mode1_reset_supported()
320 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_mode1_reset()
336 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_switch_power_profile()
345 			adev->powerplay.pp_handle, type, en);  in amdgpu_dpm_switch_power_profile()
355 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_pause_power_profile()
364 			adev->powerplay.pp_handle, pause);  in amdgpu_dpm_pause_power_profile()
374 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_xgmi_pstate()
379 		ret = pp_funcs->set_xgmi_pstate(adev->powerplay.pp_handle,  in amdgpu_dpm_set_xgmi_pstate()
391 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_df_cstate()
392 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_set_df_cstate()
406 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_get_pm_policy_info()
421 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_set_pm_policy()
435 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_enable_mgpu_fan_boost()
437 			adev->powerplay.pp_funcs;  in amdgpu_dpm_enable_mgpu_fan_boost()
452 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_set_clockgating_by_smu()
454 			adev->powerplay.pp_funcs;  in amdgpu_dpm_set_clockgating_by_smu()
470 	void *pp_handle = adev->powerplay.pp_handle;  in amdgpu_dpm_smu_i2c_bus_access()
472 			adev->powerplay.pp_funcs;  in amdgpu_dpm_smu_i2c_bus_access()
494 		if (adev->powerplay.pp_funcs &&  in amdgpu_pm_acpi_event_handler()
495 		    adev->powerplay.pp_funcs->enable_bapm)  in amdgpu_pm_acpi_event_handler()
499 			smu_set_ac_dc(adev->powerplay.pp_handle);  in amdgpu_pm_acpi_event_handler()
508 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_read_sensor()
516 		ret = pp_funcs->read_sensor(adev->powerplay.pp_handle,  in amdgpu_dpm_read_sensor()
528 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_apu_thermal_limit()
533 		ret = pp_funcs->get_apu_thermal_limit(adev->powerplay.pp_handle, limit);  in amdgpu_dpm_get_apu_thermal_limit()
542 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_apu_thermal_limit()
547 		ret = pp_funcs->set_apu_thermal_limit(adev->powerplay.pp_handle, limit);  in amdgpu_dpm_set_apu_thermal_limit()
556 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_compute_clocks()
575 	pp_funcs->pm_compute_clocks(adev->powerplay.pp_handle);  in amdgpu_dpm_compute_clocks()
660 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_pm_load_smu_firmware()
668 	r = pp_funcs->load_firmware(adev->powerplay.pp_handle);  in amdgpu_pm_load_smu_firmware()
688 		ret = smu_handle_passthrough_sbr(adev->powerplay.pp_handle,  in amdgpu_dpm_handle_passthrough_sbr()
698 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_send_hbm_bad_pages_num()
713 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_send_hbm_bad_channel_flag()
728 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_send_rma_reason()
755 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_reset_sdma_is_supported()
770 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_reset_sdma()
797 	ret = smu_get_dpm_freq_range(adev->powerplay.pp_handle,  in amdgpu_dpm_get_dpm_freq_range()
811 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_set_soft_freq_range()
832 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_write_watermarks_table()
849 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_wait_for_event()
864 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_set_residency_gfxoff()
879 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_get_residency_gfxoff()
894 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_get_entrycount_gfxoff()
909 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_get_status_gfxoff()
924 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_get_thermal_throttling_counter()
941 	if (adev->powerplay.pp_funcs &&  in amdgpu_dpm_gfx_state_change()
942 	    adev->powerplay.pp_funcs->gfx_state_change_set)  in amdgpu_dpm_gfx_state_change()
943 		((adev)->powerplay.pp_funcs->gfx_state_change_set(  in amdgpu_dpm_gfx_state_change()
944 			(adev)->powerplay.pp_handle, state));  in amdgpu_dpm_gfx_state_change()
951 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_get_ecc_info()
967 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_vce_clock_state()
974 	vstate = pp_funcs->get_vce_clock_state(adev->powerplay.pp_handle,  in amdgpu_dpm_get_vce_clock_state()
984 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_current_power_state()
993 	*state = pp_funcs->get_current_power_state(adev->powerplay.pp_handle);  in amdgpu_dpm_get_current_power_state()
1020 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_performance_level()
1028 		level = pp_funcs->get_performance_level(adev->powerplay.pp_handle);  in amdgpu_dpm_get_performance_level()
1057 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_force_performance_level()
1097 	if (pp_funcs->force_performance_level(adev->powerplay.pp_handle,  in amdgpu_dpm_force_performance_level()
1121 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_pp_num_states()
1128 	ret = pp_funcs->get_pp_num_states(adev->powerplay.pp_handle,  in amdgpu_dpm_get_pp_num_states()
1139 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_dispatch_task()
1146 	ret = pp_funcs->dispatch_tasks(adev->powerplay.pp_handle,  in amdgpu_dpm_dispatch_task()
1156 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_pp_table()
1163 	ret = pp_funcs->get_pp_table(adev->powerplay.pp_handle,  in amdgpu_dpm_get_pp_table()
1175 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_fine_grain_clk_vol()
1182 	ret = pp_funcs->set_fine_grain_clk_vol(adev->powerplay.pp_handle,  in amdgpu_dpm_set_fine_grain_clk_vol()
1196 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_odn_edit_dpm_table()
1203 	ret = pp_funcs->odn_edit_dpm_table(adev->powerplay.pp_handle,  in amdgpu_dpm_odn_edit_dpm_table()
1216 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_print_clock_levels()
1223 	ret = pp_funcs->print_clock_levels(adev->powerplay.pp_handle,  in amdgpu_dpm_print_clock_levels()
1236 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_emit_clock_levels()
1243 	ret = pp_funcs->emit_clock_levels(adev->powerplay.pp_handle,  in amdgpu_dpm_emit_clock_levels()
1255 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_ppfeature_status()
1262 	ret = pp_funcs->set_ppfeature_status(adev->powerplay.pp_handle,  in amdgpu_dpm_set_ppfeature_status()
1271 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_ppfeature_status()
1278 	ret = pp_funcs->get_ppfeature_status(adev->powerplay.pp_handle,  in amdgpu_dpm_get_ppfeature_status()
1289 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_force_clock_level()
1296 	ret = pp_funcs->force_clock_level(adev->powerplay.pp_handle,  in amdgpu_dpm_force_clock_level()
1306 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_sclk_od()
1313 	ret = pp_funcs->get_sclk_od(adev->powerplay.pp_handle);  in amdgpu_dpm_get_sclk_od()
1321 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_sclk_od()
1328 		pp_funcs->set_sclk_od(adev->powerplay.pp_handle, value);  in amdgpu_dpm_set_sclk_od()
1343 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_mclk_od()
1350 	ret = pp_funcs->get_mclk_od(adev->powerplay.pp_handle);  in amdgpu_dpm_get_mclk_od()
1358 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_mclk_od()
1365 		pp_funcs->set_mclk_od(adev->powerplay.pp_handle, value);  in amdgpu_dpm_set_mclk_od()
1381 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_power_profile_mode()
1388 	ret = pp_funcs->get_power_profile_mode(adev->powerplay.pp_handle,  in amdgpu_dpm_get_power_profile_mode()
1398 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_power_profile_mode()
1405 	ret = pp_funcs->set_power_profile_mode(adev->powerplay.pp_handle,  in amdgpu_dpm_set_power_profile_mode()
1415 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_gpu_metrics()
1422 	ret = pp_funcs->get_gpu_metrics(adev->powerplay.pp_handle,  in amdgpu_dpm_get_gpu_metrics()
1432 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_pm_metrics()
1439 	ret = pp_funcs->get_pm_metrics(adev->powerplay.pp_handle, pm_metrics,  in amdgpu_dpm_get_pm_metrics()
1449 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_fan_control_mode()
1456 	ret = pp_funcs->get_fan_control_mode(adev->powerplay.pp_handle,  in amdgpu_dpm_get_fan_control_mode()
1466 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_fan_speed_pwm()
1473 	ret = pp_funcs->set_fan_speed_pwm(adev->powerplay.pp_handle,  in amdgpu_dpm_set_fan_speed_pwm()
1483 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_fan_speed_pwm()
1490 	ret = pp_funcs->get_fan_speed_pwm(adev->powerplay.pp_handle,  in amdgpu_dpm_get_fan_speed_pwm()
1500 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_fan_speed_rpm()
1507 	ret = pp_funcs->get_fan_speed_rpm(adev->powerplay.pp_handle,  in amdgpu_dpm_get_fan_speed_rpm()
1517 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_fan_speed_rpm()
1524 	ret = pp_funcs->set_fan_speed_rpm(adev->powerplay.pp_handle,  in amdgpu_dpm_set_fan_speed_rpm()
1534 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_fan_control_mode()
1541 	ret = pp_funcs->set_fan_control_mode(adev->powerplay.pp_handle,  in amdgpu_dpm_set_fan_control_mode()
1553 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_power_limit()
1560 	ret = pp_funcs->get_power_limit(adev->powerplay.pp_handle,  in amdgpu_dpm_get_power_limit()
1572 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_power_limit()
1579 	ret = pp_funcs->set_power_limit(adev->powerplay.pp_handle,  in amdgpu_dpm_set_power_limit()
1603 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_debugfs_print_current_performance_level()
1609 	pp_funcs->debugfs_print_current_performance_level(adev->powerplay.pp_handle,  in amdgpu_dpm_debugfs_print_current_performance_level()
1620 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_smu_prv_buf_details()
1627 	ret = pp_funcs->get_smu_prv_buf_details(adev->powerplay.pp_handle,  in amdgpu_dpm_get_smu_prv_buf_details()
1638 		struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_is_overdrive_supported()
1651 		hwmgr = (struct pp_hwmgr *)adev->powerplay.pp_handle;  in amdgpu_dpm_is_overdrive_supported()
1661 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_pp_table()
1668 	ret = pp_funcs->set_pp_table(adev->powerplay.pp_handle,  in amdgpu_dpm_set_pp_table()
1678 	struct smu_context *smu = adev->powerplay.pp_handle;  in amdgpu_dpm_get_num_cpu_cores()
1697 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_display_configuration_change()
1704 	ret = pp_funcs->display_configuration_change(adev->powerplay.pp_handle,  in amdgpu_dpm_display_configuration_change()
1715 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_clock_by_type()
1722 	ret = pp_funcs->get_clock_by_type(adev->powerplay.pp_handle,  in amdgpu_dpm_get_clock_by_type()
1733 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_display_mode_validation_clks()
1740 	ret = pp_funcs->get_display_mode_validation_clocks(adev->powerplay.pp_handle,  in amdgpu_dpm_get_display_mode_validation_clks()
1751 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_clock_by_type_with_latency()
1758 	ret = pp_funcs->get_clock_by_type_with_latency(adev->powerplay.pp_handle,  in amdgpu_dpm_get_clock_by_type_with_latency()
1770 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_clock_by_type_with_voltage()
1777 	ret = pp_funcs->get_clock_by_type_with_voltage(adev->powerplay.pp_handle,  in amdgpu_dpm_get_clock_by_type_with_voltage()
1788 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_watermarks_for_clocks_ranges()
1795 	ret = pp_funcs->set_watermarks_for_clocks_ranges(adev->powerplay.pp_handle,  in amdgpu_dpm_set_watermarks_for_clocks_ranges()
1805 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_display_clock_voltage_request()
1812 	ret = pp_funcs->display_clock_voltage_request(adev->powerplay.pp_handle,  in amdgpu_dpm_display_clock_voltage_request()
1822 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_current_clocks()
1829 	ret = pp_funcs->get_current_clocks(adev->powerplay.pp_handle,  in amdgpu_dpm_get_current_clocks()
1838 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_notify_smu_enable_pwe()
1844 	pp_funcs->notify_smu_enable_pwe(adev->powerplay.pp_handle);  in amdgpu_dpm_notify_smu_enable_pwe()
1851 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_active_display_count()
1858 	ret = pp_funcs->set_active_display_count(adev->powerplay.pp_handle,  in amdgpu_dpm_set_active_display_count()
1868 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_min_deep_sleep_dcefclk()
1875 	ret = pp_funcs->set_min_deep_sleep_dcefclk(adev->powerplay.pp_handle,  in amdgpu_dpm_set_min_deep_sleep_dcefclk()
1885 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_hard_min_dcefclk_by_freq()
1891 	pp_funcs->set_hard_min_dcefclk_by_freq(adev->powerplay.pp_handle,  in amdgpu_dpm_set_hard_min_dcefclk_by_freq()
1899 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_set_hard_min_fclk_by_freq()
1905 	pp_funcs->set_hard_min_fclk_by_freq(adev->powerplay.pp_handle,  in amdgpu_dpm_set_hard_min_fclk_by_freq()
1913 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_display_disable_memory_clock_switch()
1920 	ret = pp_funcs->display_disable_memory_clock_switch(adev->powerplay.pp_handle,  in amdgpu_dpm_display_disable_memory_clock_switch()
1930 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_max_sustainable_clocks_by_dc()
1937 	ret = pp_funcs->get_max_sustainable_clocks_by_dc(adev->powerplay.pp_handle,  in amdgpu_dpm_get_max_sustainable_clocks_by_dc()
1948 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_uclk_dpm_states()
1955 	ret = pp_funcs->get_uclk_dpm_states(adev->powerplay.pp_handle,  in amdgpu_dpm_get_uclk_dpm_states()
1966 	const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;  in amdgpu_dpm_get_dpm_clock_table()
1973 	ret = pp_funcs->get_dpm_clock_table(adev->powerplay.pp_handle,  in amdgpu_dpm_get_dpm_clock_table()