Lines Matching refs:adev
36 #define amdgpu_dpm_enable_bapm(adev, e) \ argument
37 ((adev)->powerplay.pp_funcs->enable_bapm((adev)->powerplay.pp_handle, (e)))
39 #define amdgpu_dpm_is_legacy_dpm(adev) ((adev)->powerplay.pp_handle == (adev)) argument
41 int amdgpu_dpm_get_sclk(struct amdgpu_device *adev, bool low) in amdgpu_dpm_get_sclk() argument
43 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_sclk()
49 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_sclk()
50 ret = pp_funcs->get_sclk((adev)->powerplay.pp_handle, in amdgpu_dpm_get_sclk()
52 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_sclk()
57 int amdgpu_dpm_get_mclk(struct amdgpu_device *adev, bool low) in amdgpu_dpm_get_mclk() argument
59 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_mclk()
65 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_mclk()
66 ret = pp_funcs->get_mclk((adev)->powerplay.pp_handle, in amdgpu_dpm_get_mclk()
68 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_mclk()
73 int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, in amdgpu_dpm_set_powergating_by_smu() argument
79 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_powergating_by_smu()
83 if (atomic_read(&adev->pm.pwr_state[block_type]) == pwr_state && in amdgpu_dpm_set_powergating_by_smu()
84 (!is_vcn || adev->vcn.num_vcn_inst == 1)) { in amdgpu_dpm_set_powergating_by_smu()
85 dev_dbg(adev->dev, "IP block%d already in the target %s state!", in amdgpu_dpm_set_powergating_by_smu()
90 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_powergating_by_smu()
103 (adev)->powerplay.pp_handle, block_type, gate, 0)); in amdgpu_dpm_set_powergating_by_smu()
108 (adev)->powerplay.pp_handle, block_type, gate, inst)); in amdgpu_dpm_set_powergating_by_smu()
115 atomic_set(&adev->pm.pwr_state[block_type], pwr_state); in amdgpu_dpm_set_powergating_by_smu()
117 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_powergating_by_smu()
122 int amdgpu_dpm_set_gfx_power_up_by_imu(struct amdgpu_device *adev) in amdgpu_dpm_set_gfx_power_up_by_imu() argument
124 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_set_gfx_power_up_by_imu()
127 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_gfx_power_up_by_imu()
129 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_gfx_power_up_by_imu()
136 int amdgpu_dpm_baco_enter(struct amdgpu_device *adev) in amdgpu_dpm_baco_enter() argument
138 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_baco_enter()
139 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_baco_enter()
145 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_baco_enter()
150 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_baco_enter()
155 int amdgpu_dpm_baco_exit(struct amdgpu_device *adev) in amdgpu_dpm_baco_exit() argument
157 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_baco_exit()
158 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_baco_exit()
164 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_baco_exit()
169 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_baco_exit()
174 int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev, in amdgpu_dpm_set_mp1_state() argument
178 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_mp1_state()
182 if (amdgpu_sriov_vf(adev)) in amdgpu_dpm_set_mp1_state()
183 adev->pm.dpm_enabled = false; in amdgpu_dpm_set_mp1_state()
185 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_mp1_state()
188 adev->powerplay.pp_handle, in amdgpu_dpm_set_mp1_state()
191 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_mp1_state()
197 int amdgpu_dpm_notify_rlc_state(struct amdgpu_device *adev, bool en) in amdgpu_dpm_notify_rlc_state() argument
200 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_notify_rlc_state()
203 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_notify_rlc_state()
206 adev->powerplay.pp_handle, in amdgpu_dpm_notify_rlc_state()
209 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_notify_rlc_state()
215 int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev) in amdgpu_dpm_is_baco_supported() argument
217 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_is_baco_supported()
218 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_is_baco_supported()
232 if (adev->in_s3) in amdgpu_dpm_is_baco_supported()
235 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_is_baco_supported()
239 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_is_baco_supported()
244 int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev) in amdgpu_dpm_mode2_reset() argument
246 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_mode2_reset()
247 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_mode2_reset()
253 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_mode2_reset()
257 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_mode2_reset()
262 int amdgpu_dpm_enable_gfx_features(struct amdgpu_device *adev) in amdgpu_dpm_enable_gfx_features() argument
264 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_enable_gfx_features()
265 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_enable_gfx_features()
271 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_enable_gfx_features()
275 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_enable_gfx_features()
280 int amdgpu_dpm_baco_reset(struct amdgpu_device *adev) in amdgpu_dpm_baco_reset() argument
282 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_baco_reset()
283 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_baco_reset()
289 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_baco_reset()
300 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_baco_reset()
304 bool amdgpu_dpm_is_mode1_reset_supported(struct amdgpu_device *adev) in amdgpu_dpm_is_mode1_reset_supported() argument
306 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_is_mode1_reset_supported()
309 if (is_support_sw_smu(adev)) { in amdgpu_dpm_is_mode1_reset_supported()
310 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_is_mode1_reset_supported()
312 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_is_mode1_reset_supported()
318 int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev) in amdgpu_dpm_mode1_reset() argument
320 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_mode1_reset()
323 if (is_support_sw_smu(adev)) { in amdgpu_dpm_mode1_reset()
324 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_mode1_reset()
326 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_mode1_reset()
332 int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev, in amdgpu_dpm_switch_power_profile() argument
336 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_switch_power_profile()
339 if (amdgpu_sriov_vf(adev)) in amdgpu_dpm_switch_power_profile()
343 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_switch_power_profile()
345 adev->powerplay.pp_handle, type, en); in amdgpu_dpm_switch_power_profile()
346 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_switch_power_profile()
352 int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev, in amdgpu_dpm_pause_power_profile() argument
355 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_pause_power_profile()
358 if (amdgpu_sriov_vf(adev)) in amdgpu_dpm_pause_power_profile()
362 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_pause_power_profile()
364 adev->powerplay.pp_handle, pause); in amdgpu_dpm_pause_power_profile()
365 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_pause_power_profile()
371 int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev, in amdgpu_dpm_set_xgmi_pstate() argument
374 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_xgmi_pstate()
378 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_xgmi_pstate()
379 ret = pp_funcs->set_xgmi_pstate(adev->powerplay.pp_handle, in amdgpu_dpm_set_xgmi_pstate()
381 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_xgmi_pstate()
387 int amdgpu_dpm_set_df_cstate(struct amdgpu_device *adev, in amdgpu_dpm_set_df_cstate() argument
391 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_df_cstate()
392 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_set_df_cstate()
395 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_df_cstate()
397 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_df_cstate()
403 ssize_t amdgpu_dpm_get_pm_policy_info(struct amdgpu_device *adev, in amdgpu_dpm_get_pm_policy_info() argument
406 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_get_pm_policy_info()
409 if (is_support_sw_smu(adev)) { in amdgpu_dpm_get_pm_policy_info()
410 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_pm_policy_info()
412 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_pm_policy_info()
418 int amdgpu_dpm_set_pm_policy(struct amdgpu_device *adev, int policy_type, in amdgpu_dpm_set_pm_policy() argument
421 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_set_pm_policy()
424 if (is_support_sw_smu(adev)) { in amdgpu_dpm_set_pm_policy()
425 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_pm_policy()
427 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_pm_policy()
433 int amdgpu_dpm_enable_mgpu_fan_boost(struct amdgpu_device *adev) in amdgpu_dpm_enable_mgpu_fan_boost() argument
435 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_enable_mgpu_fan_boost()
437 adev->powerplay.pp_funcs; in amdgpu_dpm_enable_mgpu_fan_boost()
441 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_enable_mgpu_fan_boost()
443 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_enable_mgpu_fan_boost()
449 int amdgpu_dpm_set_clockgating_by_smu(struct amdgpu_device *adev, in amdgpu_dpm_set_clockgating_by_smu() argument
452 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_set_clockgating_by_smu()
454 adev->powerplay.pp_funcs; in amdgpu_dpm_set_clockgating_by_smu()
458 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_clockgating_by_smu()
461 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_clockgating_by_smu()
467 int amdgpu_dpm_smu_i2c_bus_access(struct amdgpu_device *adev, in amdgpu_dpm_smu_i2c_bus_access() argument
470 void *pp_handle = adev->powerplay.pp_handle; in amdgpu_dpm_smu_i2c_bus_access()
472 adev->powerplay.pp_funcs; in amdgpu_dpm_smu_i2c_bus_access()
476 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_smu_i2c_bus_access()
479 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_smu_i2c_bus_access()
485 void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) in amdgpu_pm_acpi_event_handler() argument
487 if (adev->pm.dpm_enabled) { in amdgpu_pm_acpi_event_handler()
488 mutex_lock(&adev->pm.mutex); in amdgpu_pm_acpi_event_handler()
490 adev->pm.ac_power = true; in amdgpu_pm_acpi_event_handler()
492 adev->pm.ac_power = false; in amdgpu_pm_acpi_event_handler()
494 if (adev->powerplay.pp_funcs && in amdgpu_pm_acpi_event_handler()
495 adev->powerplay.pp_funcs->enable_bapm) in amdgpu_pm_acpi_event_handler()
496 amdgpu_dpm_enable_bapm(adev, adev->pm.ac_power); in amdgpu_pm_acpi_event_handler()
498 if (is_support_sw_smu(adev)) in amdgpu_pm_acpi_event_handler()
499 smu_set_ac_dc(adev->powerplay.pp_handle); in amdgpu_pm_acpi_event_handler()
501 mutex_unlock(&adev->pm.mutex); in amdgpu_pm_acpi_event_handler()
505 int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor, in amdgpu_dpm_read_sensor() argument
508 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_read_sensor()
515 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_read_sensor()
516 ret = pp_funcs->read_sensor(adev->powerplay.pp_handle, in amdgpu_dpm_read_sensor()
520 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_read_sensor()
526 int amdgpu_dpm_get_apu_thermal_limit(struct amdgpu_device *adev, uint32_t *limit) in amdgpu_dpm_get_apu_thermal_limit() argument
528 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_apu_thermal_limit()
532 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_apu_thermal_limit()
533 ret = pp_funcs->get_apu_thermal_limit(adev->powerplay.pp_handle, limit); in amdgpu_dpm_get_apu_thermal_limit()
534 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_apu_thermal_limit()
540 int amdgpu_dpm_set_apu_thermal_limit(struct amdgpu_device *adev, uint32_t limit) in amdgpu_dpm_set_apu_thermal_limit() argument
542 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_apu_thermal_limit()
546 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_apu_thermal_limit()
547 ret = pp_funcs->set_apu_thermal_limit(adev->powerplay.pp_handle, limit); in amdgpu_dpm_set_apu_thermal_limit()
548 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_apu_thermal_limit()
554 void amdgpu_dpm_compute_clocks(struct amdgpu_device *adev) in amdgpu_dpm_compute_clocks() argument
556 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_compute_clocks()
559 if (!adev->pm.dpm_enabled) in amdgpu_dpm_compute_clocks()
565 if (adev->mode_info.num_crtc) in amdgpu_dpm_compute_clocks()
566 amdgpu_display_bandwidth_update(adev); in amdgpu_dpm_compute_clocks()
569 struct amdgpu_ring *ring = adev->rings[i]; in amdgpu_dpm_compute_clocks()
574 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_compute_clocks()
575 pp_funcs->pm_compute_clocks(adev->powerplay.pp_handle); in amdgpu_dpm_compute_clocks()
576 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_compute_clocks()
579 void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) in amdgpu_dpm_enable_uvd() argument
583 if (adev->family == AMDGPU_FAMILY_SI) { in amdgpu_dpm_enable_uvd()
584 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_enable_uvd()
586 adev->pm.dpm.uvd_active = true; in amdgpu_dpm_enable_uvd()
587 adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD; in amdgpu_dpm_enable_uvd()
589 adev->pm.dpm.uvd_active = false; in amdgpu_dpm_enable_uvd()
591 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_enable_uvd()
593 amdgpu_dpm_compute_clocks(adev); in amdgpu_dpm_enable_uvd()
597 ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable, 0); in amdgpu_dpm_enable_uvd()
603 void amdgpu_dpm_enable_vcn(struct amdgpu_device *adev, bool enable, int inst) in amdgpu_dpm_enable_vcn() argument
607 ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCN, !enable, inst); in amdgpu_dpm_enable_vcn()
613 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable) in amdgpu_dpm_enable_vce() argument
617 if (adev->family == AMDGPU_FAMILY_SI) { in amdgpu_dpm_enable_vce()
618 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_enable_vce()
620 adev->pm.dpm.vce_active = true; in amdgpu_dpm_enable_vce()
622 adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL; in amdgpu_dpm_enable_vce()
624 adev->pm.dpm.vce_active = false; in amdgpu_dpm_enable_vce()
626 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_enable_vce()
628 amdgpu_dpm_compute_clocks(adev); in amdgpu_dpm_enable_vce()
632 ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable, 0); in amdgpu_dpm_enable_vce()
638 void amdgpu_dpm_enable_jpeg(struct amdgpu_device *adev, bool enable) in amdgpu_dpm_enable_jpeg() argument
642 ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_JPEG, !enable, 0); in amdgpu_dpm_enable_jpeg()
648 void amdgpu_dpm_enable_vpe(struct amdgpu_device *adev, bool enable) in amdgpu_dpm_enable_vpe() argument
652 ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VPE, !enable, 0); in amdgpu_dpm_enable_vpe()
658 int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version) in amdgpu_pm_load_smu_firmware() argument
660 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_pm_load_smu_firmware()
664 (is_support_sw_smu(adev) && (adev->flags & AMD_IS_APU))) in amdgpu_pm_load_smu_firmware()
667 mutex_lock(&adev->pm.mutex); in amdgpu_pm_load_smu_firmware()
668 r = pp_funcs->load_firmware(adev->powerplay.pp_handle); in amdgpu_pm_load_smu_firmware()
675 *smu_version = adev->pm.fw_version; in amdgpu_pm_load_smu_firmware()
678 mutex_unlock(&adev->pm.mutex); in amdgpu_pm_load_smu_firmware()
682 int amdgpu_dpm_handle_passthrough_sbr(struct amdgpu_device *adev, bool enable) in amdgpu_dpm_handle_passthrough_sbr() argument
686 if (is_support_sw_smu(adev)) { in amdgpu_dpm_handle_passthrough_sbr()
687 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_handle_passthrough_sbr()
688 ret = smu_handle_passthrough_sbr(adev->powerplay.pp_handle, in amdgpu_dpm_handle_passthrough_sbr()
690 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_handle_passthrough_sbr()
696 int amdgpu_dpm_send_hbm_bad_pages_num(struct amdgpu_device *adev, uint32_t size) in amdgpu_dpm_send_hbm_bad_pages_num() argument
698 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_send_hbm_bad_pages_num()
701 if (!is_support_sw_smu(adev)) in amdgpu_dpm_send_hbm_bad_pages_num()
704 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_send_hbm_bad_pages_num()
706 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_send_hbm_bad_pages_num()
711 int amdgpu_dpm_send_hbm_bad_channel_flag(struct amdgpu_device *adev, uint32_t size) in amdgpu_dpm_send_hbm_bad_channel_flag() argument
713 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_send_hbm_bad_channel_flag()
716 if (!is_support_sw_smu(adev)) in amdgpu_dpm_send_hbm_bad_channel_flag()
719 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_send_hbm_bad_channel_flag()
721 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_send_hbm_bad_channel_flag()
726 int amdgpu_dpm_send_rma_reason(struct amdgpu_device *adev) in amdgpu_dpm_send_rma_reason() argument
728 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_send_rma_reason()
731 if (!is_support_sw_smu(adev)) in amdgpu_dpm_send_rma_reason()
734 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_send_rma_reason()
736 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_send_rma_reason()
738 if (adev->cper.enabled) in amdgpu_dpm_send_rma_reason()
739 if (amdgpu_cper_generate_bp_threshold_record(adev)) in amdgpu_dpm_send_rma_reason()
740 dev_warn(adev->dev, "fail to generate bad page threshold cper records\n"); in amdgpu_dpm_send_rma_reason()
753 bool amdgpu_dpm_reset_sdma_is_supported(struct amdgpu_device *adev) in amdgpu_dpm_reset_sdma_is_supported() argument
755 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_reset_sdma_is_supported()
758 if (!is_support_sw_smu(adev)) in amdgpu_dpm_reset_sdma_is_supported()
761 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_reset_sdma_is_supported()
763 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_reset_sdma_is_supported()
768 int amdgpu_dpm_reset_sdma(struct amdgpu_device *adev, uint32_t inst_mask) in amdgpu_dpm_reset_sdma() argument
770 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_reset_sdma()
773 if (!is_support_sw_smu(adev)) in amdgpu_dpm_reset_sdma()
776 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_reset_sdma()
778 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_reset_sdma()
783 int amdgpu_dpm_get_dpm_freq_range(struct amdgpu_device *adev, in amdgpu_dpm_get_dpm_freq_range() argument
793 if (!is_support_sw_smu(adev)) in amdgpu_dpm_get_dpm_freq_range()
796 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_dpm_freq_range()
797 ret = smu_get_dpm_freq_range(adev->powerplay.pp_handle, in amdgpu_dpm_get_dpm_freq_range()
801 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_dpm_freq_range()
806 int amdgpu_dpm_set_soft_freq_range(struct amdgpu_device *adev, in amdgpu_dpm_set_soft_freq_range() argument
811 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_set_soft_freq_range()
817 if (!is_support_sw_smu(adev)) in amdgpu_dpm_set_soft_freq_range()
820 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_soft_freq_range()
825 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_soft_freq_range()
830 int amdgpu_dpm_write_watermarks_table(struct amdgpu_device *adev) in amdgpu_dpm_write_watermarks_table() argument
832 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_write_watermarks_table()
835 if (!is_support_sw_smu(adev)) in amdgpu_dpm_write_watermarks_table()
838 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_write_watermarks_table()
840 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_write_watermarks_table()
845 int amdgpu_dpm_wait_for_event(struct amdgpu_device *adev, in amdgpu_dpm_wait_for_event() argument
849 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_wait_for_event()
852 if (!is_support_sw_smu(adev)) in amdgpu_dpm_wait_for_event()
855 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_wait_for_event()
857 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_wait_for_event()
862 int amdgpu_dpm_set_residency_gfxoff(struct amdgpu_device *adev, bool value) in amdgpu_dpm_set_residency_gfxoff() argument
864 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_set_residency_gfxoff()
867 if (!is_support_sw_smu(adev)) in amdgpu_dpm_set_residency_gfxoff()
870 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_residency_gfxoff()
872 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_residency_gfxoff()
877 int amdgpu_dpm_get_residency_gfxoff(struct amdgpu_device *adev, u32 *value) in amdgpu_dpm_get_residency_gfxoff() argument
879 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_get_residency_gfxoff()
882 if (!is_support_sw_smu(adev)) in amdgpu_dpm_get_residency_gfxoff()
885 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_residency_gfxoff()
887 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_residency_gfxoff()
892 int amdgpu_dpm_get_entrycount_gfxoff(struct amdgpu_device *adev, u64 *value) in amdgpu_dpm_get_entrycount_gfxoff() argument
894 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_get_entrycount_gfxoff()
897 if (!is_support_sw_smu(adev)) in amdgpu_dpm_get_entrycount_gfxoff()
900 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_entrycount_gfxoff()
902 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_entrycount_gfxoff()
907 int amdgpu_dpm_get_status_gfxoff(struct amdgpu_device *adev, uint32_t *value) in amdgpu_dpm_get_status_gfxoff() argument
909 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_get_status_gfxoff()
912 if (!is_support_sw_smu(adev)) in amdgpu_dpm_get_status_gfxoff()
915 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_status_gfxoff()
917 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_status_gfxoff()
922 uint64_t amdgpu_dpm_get_thermal_throttling_counter(struct amdgpu_device *adev) in amdgpu_dpm_get_thermal_throttling_counter() argument
924 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_get_thermal_throttling_counter()
926 if (!is_support_sw_smu(adev)) in amdgpu_dpm_get_thermal_throttling_counter()
937 void amdgpu_dpm_gfx_state_change(struct amdgpu_device *adev, in amdgpu_dpm_gfx_state_change() argument
940 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_gfx_state_change()
941 if (adev->powerplay.pp_funcs && in amdgpu_dpm_gfx_state_change()
942 adev->powerplay.pp_funcs->gfx_state_change_set) in amdgpu_dpm_gfx_state_change()
943 ((adev)->powerplay.pp_funcs->gfx_state_change_set( in amdgpu_dpm_gfx_state_change()
944 (adev)->powerplay.pp_handle, state)); in amdgpu_dpm_gfx_state_change()
945 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_gfx_state_change()
948 int amdgpu_dpm_get_ecc_info(struct amdgpu_device *adev, in amdgpu_dpm_get_ecc_info() argument
951 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_get_ecc_info()
954 if (!is_support_sw_smu(adev)) in amdgpu_dpm_get_ecc_info()
957 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_ecc_info()
959 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_ecc_info()
964 struct amd_vce_state *amdgpu_dpm_get_vce_clock_state(struct amdgpu_device *adev, in amdgpu_dpm_get_vce_clock_state() argument
967 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_vce_clock_state()
973 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_vce_clock_state()
974 vstate = pp_funcs->get_vce_clock_state(adev->powerplay.pp_handle, in amdgpu_dpm_get_vce_clock_state()
976 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_vce_clock_state()
981 void amdgpu_dpm_get_current_power_state(struct amdgpu_device *adev, in amdgpu_dpm_get_current_power_state() argument
984 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_current_power_state()
986 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_current_power_state()
989 *state = adev->pm.dpm.user_state; in amdgpu_dpm_get_current_power_state()
993 *state = pp_funcs->get_current_power_state(adev->powerplay.pp_handle); in amdgpu_dpm_get_current_power_state()
996 *state = adev->pm.dpm.user_state; in amdgpu_dpm_get_current_power_state()
999 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_current_power_state()
1002 void amdgpu_dpm_set_power_state(struct amdgpu_device *adev, in amdgpu_dpm_set_power_state() argument
1005 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_power_state()
1006 adev->pm.dpm.user_state = state; in amdgpu_dpm_set_power_state()
1007 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_power_state()
1009 if (is_support_sw_smu(adev)) in amdgpu_dpm_set_power_state()
1012 if (amdgpu_dpm_dispatch_task(adev, in amdgpu_dpm_set_power_state()
1015 amdgpu_dpm_compute_clocks(adev); in amdgpu_dpm_set_power_state()
1018 enum amd_dpm_forced_level amdgpu_dpm_get_performance_level(struct amdgpu_device *adev) in amdgpu_dpm_get_performance_level() argument
1020 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_performance_level()
1026 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_performance_level()
1028 level = pp_funcs->get_performance_level(adev->powerplay.pp_handle); in amdgpu_dpm_get_performance_level()
1030 level = adev->pm.dpm.forced_level; in amdgpu_dpm_get_performance_level()
1031 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_performance_level()
1036 static void amdgpu_dpm_enter_umd_state(struct amdgpu_device *adev) in amdgpu_dpm_enter_umd_state() argument
1039 amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_GFX, in amdgpu_dpm_enter_umd_state()
1041 amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_GFX, in amdgpu_dpm_enter_umd_state()
1045 static void amdgpu_dpm_exit_umd_state(struct amdgpu_device *adev) in amdgpu_dpm_exit_umd_state() argument
1048 amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_GFX, in amdgpu_dpm_exit_umd_state()
1050 amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_GFX, in amdgpu_dpm_exit_umd_state()
1054 int amdgpu_dpm_force_performance_level(struct amdgpu_device *adev, in amdgpu_dpm_force_performance_level() argument
1057 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_force_performance_level()
1067 if (adev->pm.dpm.thermal_active) in amdgpu_dpm_force_performance_level()
1070 current_level = amdgpu_dpm_get_performance_level(adev); in amdgpu_dpm_force_performance_level()
1078 if (adev->asic_type == CHIP_RAVEN) { in amdgpu_dpm_force_performance_level()
1079 if (!(adev->apu_flags & AMD_APU_IS_RAVEN2)) { in amdgpu_dpm_force_performance_level()
1082 amdgpu_gfx_off_ctrl(adev, false); in amdgpu_dpm_force_performance_level()
1085 amdgpu_gfx_off_ctrl(adev, true); in amdgpu_dpm_force_performance_level()
1090 amdgpu_dpm_enter_umd_state(adev); in amdgpu_dpm_force_performance_level()
1093 amdgpu_dpm_exit_umd_state(adev); in amdgpu_dpm_force_performance_level()
1095 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_force_performance_level()
1097 if (pp_funcs->force_performance_level(adev->powerplay.pp_handle, in amdgpu_dpm_force_performance_level()
1099 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_force_performance_level()
1103 amdgpu_dpm_exit_umd_state(adev); in amdgpu_dpm_force_performance_level()
1106 amdgpu_dpm_enter_umd_state(adev); in amdgpu_dpm_force_performance_level()
1111 adev->pm.dpm.forced_level = level; in amdgpu_dpm_force_performance_level()
1113 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_force_performance_level()
1118 int amdgpu_dpm_get_pp_num_states(struct amdgpu_device *adev, in amdgpu_dpm_get_pp_num_states() argument
1121 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_pp_num_states()
1127 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_pp_num_states()
1128 ret = pp_funcs->get_pp_num_states(adev->powerplay.pp_handle, in amdgpu_dpm_get_pp_num_states()
1130 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_pp_num_states()
1135 int amdgpu_dpm_dispatch_task(struct amdgpu_device *adev, in amdgpu_dpm_dispatch_task() argument
1139 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_dispatch_task()
1145 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_dispatch_task()
1146 ret = pp_funcs->dispatch_tasks(adev->powerplay.pp_handle, in amdgpu_dpm_dispatch_task()
1149 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_dispatch_task()
1154 int amdgpu_dpm_get_pp_table(struct amdgpu_device *adev, char **table) in amdgpu_dpm_get_pp_table() argument
1156 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_pp_table()
1162 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_pp_table()
1163 ret = pp_funcs->get_pp_table(adev->powerplay.pp_handle, in amdgpu_dpm_get_pp_table()
1165 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_pp_table()
1170 int amdgpu_dpm_set_fine_grain_clk_vol(struct amdgpu_device *adev, in amdgpu_dpm_set_fine_grain_clk_vol() argument
1175 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_fine_grain_clk_vol()
1181 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_fine_grain_clk_vol()
1182 ret = pp_funcs->set_fine_grain_clk_vol(adev->powerplay.pp_handle, in amdgpu_dpm_set_fine_grain_clk_vol()
1186 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_fine_grain_clk_vol()
1191 int amdgpu_dpm_odn_edit_dpm_table(struct amdgpu_device *adev, in amdgpu_dpm_odn_edit_dpm_table() argument
1196 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_odn_edit_dpm_table()
1202 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_odn_edit_dpm_table()
1203 ret = pp_funcs->odn_edit_dpm_table(adev->powerplay.pp_handle, in amdgpu_dpm_odn_edit_dpm_table()
1207 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_odn_edit_dpm_table()
1212 int amdgpu_dpm_print_clock_levels(struct amdgpu_device *adev, in amdgpu_dpm_print_clock_levels() argument
1216 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_print_clock_levels()
1222 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_print_clock_levels()
1223 ret = pp_funcs->print_clock_levels(adev->powerplay.pp_handle, in amdgpu_dpm_print_clock_levels()
1226 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_print_clock_levels()
1231 int amdgpu_dpm_emit_clock_levels(struct amdgpu_device *adev, in amdgpu_dpm_emit_clock_levels() argument
1236 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_emit_clock_levels()
1242 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_emit_clock_levels()
1243 ret = pp_funcs->emit_clock_levels(adev->powerplay.pp_handle, in amdgpu_dpm_emit_clock_levels()
1247 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_emit_clock_levels()
1252 int amdgpu_dpm_set_ppfeature_status(struct amdgpu_device *adev, in amdgpu_dpm_set_ppfeature_status() argument
1255 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_ppfeature_status()
1261 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_ppfeature_status()
1262 ret = pp_funcs->set_ppfeature_status(adev->powerplay.pp_handle, in amdgpu_dpm_set_ppfeature_status()
1264 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_ppfeature_status()
1269 int amdgpu_dpm_get_ppfeature_status(struct amdgpu_device *adev, char *buf) in amdgpu_dpm_get_ppfeature_status() argument
1271 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_ppfeature_status()
1277 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_ppfeature_status()
1278 ret = pp_funcs->get_ppfeature_status(adev->powerplay.pp_handle, in amdgpu_dpm_get_ppfeature_status()
1280 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_ppfeature_status()
1285 int amdgpu_dpm_force_clock_level(struct amdgpu_device *adev, in amdgpu_dpm_force_clock_level() argument
1289 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_force_clock_level()
1295 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_force_clock_level()
1296 ret = pp_funcs->force_clock_level(adev->powerplay.pp_handle, in amdgpu_dpm_force_clock_level()
1299 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_force_clock_level()
1304 int amdgpu_dpm_get_sclk_od(struct amdgpu_device *adev) in amdgpu_dpm_get_sclk_od() argument
1306 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_sclk_od()
1312 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_sclk_od()
1313 ret = pp_funcs->get_sclk_od(adev->powerplay.pp_handle); in amdgpu_dpm_get_sclk_od()
1314 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_sclk_od()
1319 int amdgpu_dpm_set_sclk_od(struct amdgpu_device *adev, uint32_t value) in amdgpu_dpm_set_sclk_od() argument
1321 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_sclk_od()
1323 if (is_support_sw_smu(adev)) in amdgpu_dpm_set_sclk_od()
1326 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_sclk_od()
1328 pp_funcs->set_sclk_od(adev->powerplay.pp_handle, value); in amdgpu_dpm_set_sclk_od()
1329 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_sclk_od()
1331 if (amdgpu_dpm_dispatch_task(adev, in amdgpu_dpm_set_sclk_od()
1334 adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; in amdgpu_dpm_set_sclk_od()
1335 amdgpu_dpm_compute_clocks(adev); in amdgpu_dpm_set_sclk_od()
1341 int amdgpu_dpm_get_mclk_od(struct amdgpu_device *adev) in amdgpu_dpm_get_mclk_od() argument
1343 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_mclk_od()
1349 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_mclk_od()
1350 ret = pp_funcs->get_mclk_od(adev->powerplay.pp_handle); in amdgpu_dpm_get_mclk_od()
1351 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_mclk_od()
1356 int amdgpu_dpm_set_mclk_od(struct amdgpu_device *adev, uint32_t value) in amdgpu_dpm_set_mclk_od() argument
1358 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_mclk_od()
1360 if (is_support_sw_smu(adev)) in amdgpu_dpm_set_mclk_od()
1363 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_mclk_od()
1365 pp_funcs->set_mclk_od(adev->powerplay.pp_handle, value); in amdgpu_dpm_set_mclk_od()
1366 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_mclk_od()
1368 if (amdgpu_dpm_dispatch_task(adev, in amdgpu_dpm_set_mclk_od()
1371 adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; in amdgpu_dpm_set_mclk_od()
1372 amdgpu_dpm_compute_clocks(adev); in amdgpu_dpm_set_mclk_od()
1378 int amdgpu_dpm_get_power_profile_mode(struct amdgpu_device *adev, in amdgpu_dpm_get_power_profile_mode() argument
1381 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_power_profile_mode()
1387 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_power_profile_mode()
1388 ret = pp_funcs->get_power_profile_mode(adev->powerplay.pp_handle, in amdgpu_dpm_get_power_profile_mode()
1390 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_power_profile_mode()
1395 int amdgpu_dpm_set_power_profile_mode(struct amdgpu_device *adev, in amdgpu_dpm_set_power_profile_mode() argument
1398 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_power_profile_mode()
1404 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_power_profile_mode()
1405 ret = pp_funcs->set_power_profile_mode(adev->powerplay.pp_handle, in amdgpu_dpm_set_power_profile_mode()
1408 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_power_profile_mode()
1413 int amdgpu_dpm_get_gpu_metrics(struct amdgpu_device *adev, void **table) in amdgpu_dpm_get_gpu_metrics() argument
1415 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_gpu_metrics()
1421 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_gpu_metrics()
1422 ret = pp_funcs->get_gpu_metrics(adev->powerplay.pp_handle, in amdgpu_dpm_get_gpu_metrics()
1424 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_gpu_metrics()
1429 ssize_t amdgpu_dpm_get_pm_metrics(struct amdgpu_device *adev, void *pm_metrics, in amdgpu_dpm_get_pm_metrics() argument
1432 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_pm_metrics()
1438 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_pm_metrics()
1439 ret = pp_funcs->get_pm_metrics(adev->powerplay.pp_handle, pm_metrics, in amdgpu_dpm_get_pm_metrics()
1441 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_pm_metrics()
1446 int amdgpu_dpm_get_fan_control_mode(struct amdgpu_device *adev, in amdgpu_dpm_get_fan_control_mode() argument
1449 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_fan_control_mode()
1455 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_fan_control_mode()
1456 ret = pp_funcs->get_fan_control_mode(adev->powerplay.pp_handle, in amdgpu_dpm_get_fan_control_mode()
1458 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_fan_control_mode()
1463 int amdgpu_dpm_set_fan_speed_pwm(struct amdgpu_device *adev, in amdgpu_dpm_set_fan_speed_pwm() argument
1466 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_fan_speed_pwm()
1472 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_fan_speed_pwm()
1473 ret = pp_funcs->set_fan_speed_pwm(adev->powerplay.pp_handle, in amdgpu_dpm_set_fan_speed_pwm()
1475 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_fan_speed_pwm()
1480 int amdgpu_dpm_get_fan_speed_pwm(struct amdgpu_device *adev, in amdgpu_dpm_get_fan_speed_pwm() argument
1483 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_fan_speed_pwm()
1489 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_fan_speed_pwm()
1490 ret = pp_funcs->get_fan_speed_pwm(adev->powerplay.pp_handle, in amdgpu_dpm_get_fan_speed_pwm()
1492 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_fan_speed_pwm()
1497 int amdgpu_dpm_get_fan_speed_rpm(struct amdgpu_device *adev, in amdgpu_dpm_get_fan_speed_rpm() argument
1500 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_fan_speed_rpm()
1506 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_fan_speed_rpm()
1507 ret = pp_funcs->get_fan_speed_rpm(adev->powerplay.pp_handle, in amdgpu_dpm_get_fan_speed_rpm()
1509 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_fan_speed_rpm()
1514 int amdgpu_dpm_set_fan_speed_rpm(struct amdgpu_device *adev, in amdgpu_dpm_set_fan_speed_rpm() argument
1517 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_fan_speed_rpm()
1523 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_fan_speed_rpm()
1524 ret = pp_funcs->set_fan_speed_rpm(adev->powerplay.pp_handle, in amdgpu_dpm_set_fan_speed_rpm()
1526 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_fan_speed_rpm()
1531 int amdgpu_dpm_set_fan_control_mode(struct amdgpu_device *adev, in amdgpu_dpm_set_fan_control_mode() argument
1534 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_fan_control_mode()
1540 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_fan_control_mode()
1541 ret = pp_funcs->set_fan_control_mode(adev->powerplay.pp_handle, in amdgpu_dpm_set_fan_control_mode()
1543 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_fan_control_mode()
1548 int amdgpu_dpm_get_power_limit(struct amdgpu_device *adev, in amdgpu_dpm_get_power_limit() argument
1553 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_power_limit()
1559 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_power_limit()
1560 ret = pp_funcs->get_power_limit(adev->powerplay.pp_handle, in amdgpu_dpm_get_power_limit()
1564 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_power_limit()
1569 int amdgpu_dpm_set_power_limit(struct amdgpu_device *adev, in amdgpu_dpm_set_power_limit() argument
1572 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_power_limit()
1578 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_power_limit()
1579 ret = pp_funcs->set_power_limit(adev->powerplay.pp_handle, in amdgpu_dpm_set_power_limit()
1581 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_power_limit()
1586 int amdgpu_dpm_is_cclk_dpm_supported(struct amdgpu_device *adev) in amdgpu_dpm_is_cclk_dpm_supported() argument
1590 if (!is_support_sw_smu(adev)) in amdgpu_dpm_is_cclk_dpm_supported()
1593 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_is_cclk_dpm_supported()
1594 cclk_dpm_supported = is_support_cclk_dpm(adev); in amdgpu_dpm_is_cclk_dpm_supported()
1595 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_is_cclk_dpm_supported()
1600 int amdgpu_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, in amdgpu_dpm_debugfs_print_current_performance_level() argument
1603 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_debugfs_print_current_performance_level()
1608 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_debugfs_print_current_performance_level()
1609 pp_funcs->debugfs_print_current_performance_level(adev->powerplay.pp_handle, in amdgpu_dpm_debugfs_print_current_performance_level()
1611 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_debugfs_print_current_performance_level()
1616 int amdgpu_dpm_get_smu_prv_buf_details(struct amdgpu_device *adev, in amdgpu_dpm_get_smu_prv_buf_details() argument
1620 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_smu_prv_buf_details()
1626 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_smu_prv_buf_details()
1627 ret = pp_funcs->get_smu_prv_buf_details(adev->powerplay.pp_handle, in amdgpu_dpm_get_smu_prv_buf_details()
1630 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_smu_prv_buf_details()
1635 int amdgpu_dpm_is_overdrive_supported(struct amdgpu_device *adev) in amdgpu_dpm_is_overdrive_supported() argument
1637 if (is_support_sw_smu(adev)) { in amdgpu_dpm_is_overdrive_supported()
1638 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_is_overdrive_supported()
1648 if (amdgpu_dpm_is_legacy_dpm(adev)) in amdgpu_dpm_is_overdrive_supported()
1651 hwmgr = (struct pp_hwmgr *)adev->powerplay.pp_handle; in amdgpu_dpm_is_overdrive_supported()
1657 int amdgpu_dpm_set_pp_table(struct amdgpu_device *adev, in amdgpu_dpm_set_pp_table() argument
1661 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_pp_table()
1667 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_pp_table()
1668 ret = pp_funcs->set_pp_table(adev->powerplay.pp_handle, in amdgpu_dpm_set_pp_table()
1671 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_pp_table()
1676 int amdgpu_dpm_get_num_cpu_cores(struct amdgpu_device *adev) in amdgpu_dpm_get_num_cpu_cores() argument
1678 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_get_num_cpu_cores()
1680 if (!is_support_sw_smu(adev)) in amdgpu_dpm_get_num_cpu_cores()
1686 void amdgpu_dpm_stb_debug_fs_init(struct amdgpu_device *adev) in amdgpu_dpm_stb_debug_fs_init() argument
1688 if (!is_support_sw_smu(adev)) in amdgpu_dpm_stb_debug_fs_init()
1691 amdgpu_smu_stb_debug_fs_init(adev); in amdgpu_dpm_stb_debug_fs_init()
1694 int amdgpu_dpm_display_configuration_change(struct amdgpu_device *adev, in amdgpu_dpm_display_configuration_change() argument
1697 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_display_configuration_change()
1703 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_display_configuration_change()
1704 ret = pp_funcs->display_configuration_change(adev->powerplay.pp_handle, in amdgpu_dpm_display_configuration_change()
1706 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_display_configuration_change()
1711 int amdgpu_dpm_get_clock_by_type(struct amdgpu_device *adev, in amdgpu_dpm_get_clock_by_type() argument
1715 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_clock_by_type()
1721 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_clock_by_type()
1722 ret = pp_funcs->get_clock_by_type(adev->powerplay.pp_handle, in amdgpu_dpm_get_clock_by_type()
1725 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_clock_by_type()
1730 int amdgpu_dpm_get_display_mode_validation_clks(struct amdgpu_device *adev, in amdgpu_dpm_get_display_mode_validation_clks() argument
1733 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_display_mode_validation_clks()
1739 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_display_mode_validation_clks()
1740 ret = pp_funcs->get_display_mode_validation_clocks(adev->powerplay.pp_handle, in amdgpu_dpm_get_display_mode_validation_clks()
1742 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_display_mode_validation_clks()
1747 int amdgpu_dpm_get_clock_by_type_with_latency(struct amdgpu_device *adev, in amdgpu_dpm_get_clock_by_type_with_latency() argument
1751 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_clock_by_type_with_latency()
1757 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_clock_by_type_with_latency()
1758 ret = pp_funcs->get_clock_by_type_with_latency(adev->powerplay.pp_handle, in amdgpu_dpm_get_clock_by_type_with_latency()
1761 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_clock_by_type_with_latency()
1766 int amdgpu_dpm_get_clock_by_type_with_voltage(struct amdgpu_device *adev, in amdgpu_dpm_get_clock_by_type_with_voltage() argument
1770 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_clock_by_type_with_voltage()
1776 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_clock_by_type_with_voltage()
1777 ret = pp_funcs->get_clock_by_type_with_voltage(adev->powerplay.pp_handle, in amdgpu_dpm_get_clock_by_type_with_voltage()
1780 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_clock_by_type_with_voltage()
1785 int amdgpu_dpm_set_watermarks_for_clocks_ranges(struct amdgpu_device *adev, in amdgpu_dpm_set_watermarks_for_clocks_ranges() argument
1788 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_watermarks_for_clocks_ranges()
1794 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_watermarks_for_clocks_ranges()
1795 ret = pp_funcs->set_watermarks_for_clocks_ranges(adev->powerplay.pp_handle, in amdgpu_dpm_set_watermarks_for_clocks_ranges()
1797 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_watermarks_for_clocks_ranges()
1802 int amdgpu_dpm_display_clock_voltage_request(struct amdgpu_device *adev, in amdgpu_dpm_display_clock_voltage_request() argument
1805 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_display_clock_voltage_request()
1811 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_display_clock_voltage_request()
1812 ret = pp_funcs->display_clock_voltage_request(adev->powerplay.pp_handle, in amdgpu_dpm_display_clock_voltage_request()
1814 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_display_clock_voltage_request()
1819 int amdgpu_dpm_get_current_clocks(struct amdgpu_device *adev, in amdgpu_dpm_get_current_clocks() argument
1822 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_current_clocks()
1828 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_current_clocks()
1829 ret = pp_funcs->get_current_clocks(adev->powerplay.pp_handle, in amdgpu_dpm_get_current_clocks()
1831 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_current_clocks()
1836 void amdgpu_dpm_notify_smu_enable_pwe(struct amdgpu_device *adev) in amdgpu_dpm_notify_smu_enable_pwe() argument
1838 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_notify_smu_enable_pwe()
1843 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_notify_smu_enable_pwe()
1844 pp_funcs->notify_smu_enable_pwe(adev->powerplay.pp_handle); in amdgpu_dpm_notify_smu_enable_pwe()
1845 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_notify_smu_enable_pwe()
1848 int amdgpu_dpm_set_active_display_count(struct amdgpu_device *adev, in amdgpu_dpm_set_active_display_count() argument
1851 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_active_display_count()
1857 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_active_display_count()
1858 ret = pp_funcs->set_active_display_count(adev->powerplay.pp_handle, in amdgpu_dpm_set_active_display_count()
1860 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_active_display_count()
1865 int amdgpu_dpm_set_min_deep_sleep_dcefclk(struct amdgpu_device *adev, in amdgpu_dpm_set_min_deep_sleep_dcefclk() argument
1868 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_min_deep_sleep_dcefclk()
1874 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_min_deep_sleep_dcefclk()
1875 ret = pp_funcs->set_min_deep_sleep_dcefclk(adev->powerplay.pp_handle, in amdgpu_dpm_set_min_deep_sleep_dcefclk()
1877 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_min_deep_sleep_dcefclk()
1882 void amdgpu_dpm_set_hard_min_dcefclk_by_freq(struct amdgpu_device *adev, in amdgpu_dpm_set_hard_min_dcefclk_by_freq() argument
1885 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_hard_min_dcefclk_by_freq()
1890 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_hard_min_dcefclk_by_freq()
1891 pp_funcs->set_hard_min_dcefclk_by_freq(adev->powerplay.pp_handle, in amdgpu_dpm_set_hard_min_dcefclk_by_freq()
1893 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_hard_min_dcefclk_by_freq()
1896 void amdgpu_dpm_set_hard_min_fclk_by_freq(struct amdgpu_device *adev, in amdgpu_dpm_set_hard_min_fclk_by_freq() argument
1899 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_hard_min_fclk_by_freq()
1904 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_set_hard_min_fclk_by_freq()
1905 pp_funcs->set_hard_min_fclk_by_freq(adev->powerplay.pp_handle, in amdgpu_dpm_set_hard_min_fclk_by_freq()
1907 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_set_hard_min_fclk_by_freq()
1910 int amdgpu_dpm_display_disable_memory_clock_switch(struct amdgpu_device *adev, in amdgpu_dpm_display_disable_memory_clock_switch() argument
1913 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_display_disable_memory_clock_switch()
1919 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_display_disable_memory_clock_switch()
1920 ret = pp_funcs->display_disable_memory_clock_switch(adev->powerplay.pp_handle, in amdgpu_dpm_display_disable_memory_clock_switch()
1922 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_display_disable_memory_clock_switch()
1927 int amdgpu_dpm_get_max_sustainable_clocks_by_dc(struct amdgpu_device *adev, in amdgpu_dpm_get_max_sustainable_clocks_by_dc() argument
1930 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_max_sustainable_clocks_by_dc()
1936 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_max_sustainable_clocks_by_dc()
1937 ret = pp_funcs->get_max_sustainable_clocks_by_dc(adev->powerplay.pp_handle, in amdgpu_dpm_get_max_sustainable_clocks_by_dc()
1939 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_max_sustainable_clocks_by_dc()
1944 enum pp_smu_status amdgpu_dpm_get_uclk_dpm_states(struct amdgpu_device *adev, in amdgpu_dpm_get_uclk_dpm_states() argument
1948 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_uclk_dpm_states()
1954 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_uclk_dpm_states()
1955 ret = pp_funcs->get_uclk_dpm_states(adev->powerplay.pp_handle, in amdgpu_dpm_get_uclk_dpm_states()
1958 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_uclk_dpm_states()
1963 int amdgpu_dpm_get_dpm_clock_table(struct amdgpu_device *adev, in amdgpu_dpm_get_dpm_clock_table() argument
1966 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_dpm_clock_table()
1972 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_dpm_clock_table()
1973 ret = pp_funcs->get_dpm_clock_table(adev->powerplay.pp_handle, in amdgpu_dpm_get_dpm_clock_table()
1975 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_dpm_clock_table()