418 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_gfx_stop()
477 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_ctx_switch_enable()
516 		for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_enable()
698 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_gfx_resume()
738 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_load_microcode()
771 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_soft_reset()
1331 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_sw_init()
1339 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_sw_init()
1379 	ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL);  in sdma_v5_2_sw_init()
1397 	for (i = 0; i < adev->sdma.num_instances; i++)  in sdma_v5_2_sw_fini()
1443 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_is_idle()
1481 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_reset_queue()
1486 	if (i == adev->sdma.num_instances) {  in sdma_v5_2_reset_queue()
1754 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_update_medium_grain_clock_gating()
1791 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_update_medium_grain_light_sleep()
1909 	drm_printf(p, "num_instances:%d\n", adev->sdma.num_instances);  in sdma_v5_2_print_ip_state()
1910 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_print_ip_state()
1931 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_dump_ip_state()
2003 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_set_ring_funcs()
2021 					adev->sdma.num_instances;  in sdma_v5_2_set_irq_funcs()
2109 		for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_2_set_vm_pte_funcs()
2113 		adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances;  in sdma_v5_2_set_vm_pte_funcs()