225 				  struct amdgpu_ib *ib,  in cik_sdma_ring_emit_ib()  argument
235 	amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */  in cik_sdma_ring_emit_ib()
236 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff);  in cik_sdma_ring_emit_ib()
237 	amdgpu_ring_write(ring, ib->length_dw);  in cik_sdma_ring_emit_ib()
656 	struct amdgpu_ib ib;  in cik_sdma_ring_test_ib()  local
670 	memset(&ib, 0, sizeof(ib));  in cik_sdma_ring_test_ib()
672 					AMDGPU_IB_POOL_DIRECT, &ib);  in cik_sdma_ring_test_ib()
676 	ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE,  in cik_sdma_ring_test_ib()
678 	ib.ptr[1] = lower_32_bits(gpu_addr);  in cik_sdma_ring_test_ib()
679 	ib.ptr[2] = upper_32_bits(gpu_addr);  in cik_sdma_ring_test_ib()
680 	ib.ptr[3] = 1;  in cik_sdma_ring_test_ib()
681 	ib.ptr[4] = 0xDEADBEEF;  in cik_sdma_ring_test_ib()
682 	ib.length_dw = 5;  in cik_sdma_ring_test_ib()
683 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in cik_sdma_ring_test_ib()
701 	amdgpu_ib_free(&ib, NULL);  in cik_sdma_ring_test_ib()
718 static void cik_sdma_vm_copy_pte(struct amdgpu_ib *ib,  in cik_sdma_vm_copy_pte()  argument
724 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY,  in cik_sdma_vm_copy_pte()
726 	ib->ptr[ib->length_dw++] = bytes;  in cik_sdma_vm_copy_pte()
727 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in cik_sdma_vm_copy_pte()
728 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in cik_sdma_vm_copy_pte()
729 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in cik_sdma_vm_copy_pte()
730 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in cik_sdma_vm_copy_pte()
731 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_copy_pte()
745 static void cik_sdma_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in cik_sdma_vm_write_pte()  argument
751 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE,  in cik_sdma_vm_write_pte()
753 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in cik_sdma_vm_write_pte()
754 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_write_pte()
755 	ib->ptr[ib->length_dw++] = ndw;  in cik_sdma_vm_write_pte()
757 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in cik_sdma_vm_write_pte()
758 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in cik_sdma_vm_write_pte()
775 static void cik_sdma_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,  in cik_sdma_vm_set_pte_pde()  argument
780 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0);  in cik_sdma_vm_set_pte_pde()
781 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in cik_sdma_vm_set_pte_pde()
782 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_set_pte_pde()
783 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in cik_sdma_vm_set_pte_pde()
784 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in cik_sdma_vm_set_pte_pde()
785 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in cik_sdma_vm_set_pte_pde()
786 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in cik_sdma_vm_set_pte_pde()
787 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in cik_sdma_vm_set_pte_pde()
788 	ib->ptr[ib->length_dw++] = 0;  in cik_sdma_vm_set_pte_pde()
789 	ib->ptr[ib->length_dw++] = count; /* number of entries */  in cik_sdma_vm_set_pte_pde()
799 static void cik_sdma_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in cik_sdma_ring_pad_ib()  argument
805 	pad_count = (-ib->length_dw) & 7;  in cik_sdma_ring_pad_ib()
808 			ib->ptr[ib->length_dw++] =  in cik_sdma_ring_pad_ib()
812 			ib->ptr[ib->length_dw++] =  in cik_sdma_ring_pad_ib()
1297 static void cik_sdma_emit_copy_buffer(struct amdgpu_ib *ib,  in cik_sdma_emit_copy_buffer()  argument
1303 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0);  in cik_sdma_emit_copy_buffer()
1304 	ib->ptr[ib->length_dw++] = byte_count;  in cik_sdma_emit_copy_buffer()
1305 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in cik_sdma_emit_copy_buffer()
1306 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in cik_sdma_emit_copy_buffer()
1307 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in cik_sdma_emit_copy_buffer()
1308 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in cik_sdma_emit_copy_buffer()
1309 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in cik_sdma_emit_copy_buffer()
1322 static void cik_sdma_emit_fill_buffer(struct amdgpu_ib *ib,  in cik_sdma_emit_fill_buffer()  argument
1327 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, 0);  in cik_sdma_emit_fill_buffer()
1328 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in cik_sdma_emit_fill_buffer()
1329 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in cik_sdma_emit_fill_buffer()
1330 	ib->ptr[ib->length_dw++] = src_data;  in cik_sdma_emit_fill_buffer()
1331 	ib->ptr[ib->length_dw++] = byte_count;  in cik_sdma_emit_fill_buffer()