Lines Matching refs:SDMA0_REGISTER_OFFSET
49 SDMA0_REGISTER_OFFSET,
880 WREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, 0x00000100); in cik_enable_sdma_mgcg()
883 orig = data = RREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET); in cik_enable_sdma_mgcg()
886 WREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, data); in cik_enable_sdma_mgcg()
901 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET); in cik_enable_sdma_mgls()
904 WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
911 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET); in cik_enable_sdma_mgls()
914 WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
1064 tmp = RREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET); in cik_sdma_soft_reset()
1066 WREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET, tmp); in cik_sdma_soft_reset()
1106 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in cik_sdma_set_trap_irq_state()
1108 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in cik_sdma_set_trap_irq_state()
1111 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in cik_sdma_set_trap_irq_state()
1113 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in cik_sdma_set_trap_irq_state()