Lines Matching refs:vcn
101 adev->vcn.inst[i].adev = adev; in amdgpu_vcn_early_init()
102 adev->vcn.inst[i].inst = i; in amdgpu_vcn_early_init()
105 if (i != 0 && adev->vcn.per_inst_fw) { in amdgpu_vcn_early_init()
106 r = amdgpu_ucode_request(adev, &adev->vcn.inst[i].fw, in amdgpu_vcn_early_init()
110 amdgpu_ucode_release(&adev->vcn.inst[i].fw); in amdgpu_vcn_early_init()
112 if (!adev->vcn.inst[0].fw) { in amdgpu_vcn_early_init()
113 r = amdgpu_ucode_request(adev, &adev->vcn.inst[0].fw, in amdgpu_vcn_early_init()
117 amdgpu_ucode_release(&adev->vcn.inst[0].fw); in amdgpu_vcn_early_init()
121 adev->vcn.inst[i].fw = adev->vcn.inst[0].fw; in amdgpu_vcn_early_init()
135 mutex_init(&adev->vcn.inst[i].vcn1_jpeg1_workaround); in amdgpu_vcn_sw_init()
136 mutex_init(&adev->vcn.inst[i].vcn_pg_lock); in amdgpu_vcn_sw_init()
137 atomic_set(&adev->vcn.inst[i].total_submission_cnt, 0); in amdgpu_vcn_sw_init()
138 INIT_DELAYED_WORK(&adev->vcn.inst[i].idle_work, amdgpu_vcn_idle_work_handler); in amdgpu_vcn_sw_init()
139 atomic_set(&adev->vcn.inst[i].dpg_enc_submission_cnt, 0); in amdgpu_vcn_sw_init()
142 adev->vcn.inst[i].indirect_sram = true; in amdgpu_vcn_sw_init()
156 adev->vcn.inst[i].indirect_sram = false; in amdgpu_vcn_sw_init()
163 adev->vcn.inst[i].using_unified_queue = in amdgpu_vcn_sw_init()
166 hdr = (const struct common_firmware_header *)adev->vcn.inst[i].fw->data; in amdgpu_vcn_sw_init()
167 adev->vcn.inst[i].fw_version = le32_to_cpu(hdr->ucode_version); in amdgpu_vcn_sw_init()
168 adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version); in amdgpu_vcn_sw_init()
221 &adev->vcn.inst[i].vcpu_bo, in amdgpu_vcn_sw_init()
222 &adev->vcn.inst[i].gpu_addr, in amdgpu_vcn_sw_init()
223 &adev->vcn.inst[i].cpu_addr); in amdgpu_vcn_sw_init()
229 adev->vcn.inst[i].fw_shared.cpu_addr = adev->vcn.inst[i].cpu_addr + in amdgpu_vcn_sw_init()
231 adev->vcn.inst[i].fw_shared.gpu_addr = adev->vcn.inst[i].gpu_addr + in amdgpu_vcn_sw_init()
234 adev->vcn.inst[i].fw_shared.mem_size = fw_shared_size; in amdgpu_vcn_sw_init()
237 adev->vcn.inst[i].fw_shared.cpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()
238 adev->vcn.inst[i].fw_shared.gpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()
239 adev->vcn.inst[i].fw_shared.log_offset = log_offset; in amdgpu_vcn_sw_init()
242 if (adev->vcn.inst[i].indirect_sram) { in amdgpu_vcn_sw_init()
246 &adev->vcn.inst[i].dpg_sram_bo, in amdgpu_vcn_sw_init()
247 &adev->vcn.inst[i].dpg_sram_gpu_addr, in amdgpu_vcn_sw_init()
248 &adev->vcn.inst[i].dpg_sram_cpu_addr); in amdgpu_vcn_sw_init()
262 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_sw_fini()
266 &adev->vcn.inst[i].dpg_sram_bo, in amdgpu_vcn_sw_fini()
267 &adev->vcn.inst[i].dpg_sram_gpu_addr, in amdgpu_vcn_sw_fini()
268 (void **)&adev->vcn.inst[i].dpg_sram_cpu_addr); in amdgpu_vcn_sw_fini()
270 kvfree(adev->vcn.inst[i].saved_bo); in amdgpu_vcn_sw_fini()
272 amdgpu_bo_free_kernel(&adev->vcn.inst[i].vcpu_bo, in amdgpu_vcn_sw_fini()
273 &adev->vcn.inst[i].gpu_addr, in amdgpu_vcn_sw_fini()
274 (void **)&adev->vcn.inst[i].cpu_addr); in amdgpu_vcn_sw_fini()
276 amdgpu_ring_fini(&adev->vcn.inst[i].ring_dec); in amdgpu_vcn_sw_fini()
278 for (j = 0; j < adev->vcn.inst[i].num_enc_rings; ++j) in amdgpu_vcn_sw_fini()
279 amdgpu_ring_fini(&adev->vcn.inst[i].ring_enc[j]); in amdgpu_vcn_sw_fini()
281 if (adev->vcn.per_inst_fw) { in amdgpu_vcn_sw_fini()
282 amdgpu_ucode_release(&adev->vcn.inst[i].fw); in amdgpu_vcn_sw_fini()
284 amdgpu_ucode_release(&adev->vcn.inst[0].fw); in amdgpu_vcn_sw_fini()
285 adev->vcn.inst[i].fw = NULL; in amdgpu_vcn_sw_fini()
287 mutex_destroy(&adev->vcn.inst[i].vcn_pg_lock); in amdgpu_vcn_sw_fini()
288 mutex_destroy(&adev->vcn.inst[i].vcn1_jpeg1_workaround); in amdgpu_vcn_sw_fini()
296 int vcn_config = adev->vcn.inst[vcn_instance].vcn_config; in amdgpu_vcn_is_disabled_vcn()
314 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_save_vcpu_bo_inst()
316 if (adev->vcn.inst[i].vcpu_bo == NULL) in amdgpu_vcn_save_vcpu_bo_inst()
319 size = amdgpu_bo_size(adev->vcn.inst[i].vcpu_bo); in amdgpu_vcn_save_vcpu_bo_inst()
320 ptr = adev->vcn.inst[i].cpu_addr; in amdgpu_vcn_save_vcpu_bo_inst()
322 adev->vcn.inst[i].saved_bo = kvmalloc(size, GFP_KERNEL); in amdgpu_vcn_save_vcpu_bo_inst()
323 if (!adev->vcn.inst[i].saved_bo) in amdgpu_vcn_save_vcpu_bo_inst()
327 memcpy_fromio(adev->vcn.inst[i].saved_bo, ptr, size); in amdgpu_vcn_save_vcpu_bo_inst()
338 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in amdgpu_vcn_save_vcpu_bo()
351 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_suspend()
354 cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work); in amdgpu_vcn_suspend()
370 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_resume()
372 if (adev->vcn.inst[i].vcpu_bo == NULL) in amdgpu_vcn_resume()
375 size = amdgpu_bo_size(adev->vcn.inst[i].vcpu_bo); in amdgpu_vcn_resume()
376 ptr = adev->vcn.inst[i].cpu_addr; in amdgpu_vcn_resume()
378 if (adev->vcn.inst[i].saved_bo != NULL) { in amdgpu_vcn_resume()
380 memcpy_toio(ptr, adev->vcn.inst[i].saved_bo, size); in amdgpu_vcn_resume()
383 kvfree(adev->vcn.inst[i].saved_bo); in amdgpu_vcn_resume()
384 adev->vcn.inst[i].saved_bo = NULL; in amdgpu_vcn_resume()
389 hdr = (const struct common_firmware_header *)adev->vcn.inst[i].fw->data; in amdgpu_vcn_resume()
393 memcpy_toio(adev->vcn.inst[i].cpu_addr, in amdgpu_vcn_resume()
394 adev->vcn.inst[i].fw->data + offset, in amdgpu_vcn_resume()
416 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_idle_work_handler()
419 for (j = 0; j < adev->vcn.inst[i].num_enc_rings; ++j) in amdgpu_vcn_idle_work_handler()
424 !adev->vcn.inst[i].using_unified_queue) { in amdgpu_vcn_idle_work_handler()
433 adev->vcn.inst[i].pause_dpg_mode(vcn_inst, &new_state); in amdgpu_vcn_idle_work_handler()
441 mutex_lock(&adev->vcn.workload_profile_mutex); in amdgpu_vcn_idle_work_handler()
442 if (adev->vcn.workload_profile_active) { in amdgpu_vcn_idle_work_handler()
447 adev->vcn.workload_profile_active = false; in amdgpu_vcn_idle_work_handler()
449 mutex_unlock(&adev->vcn.workload_profile_mutex); in amdgpu_vcn_idle_work_handler()
458 struct amdgpu_vcn_inst *vcn_inst = &adev->vcn.inst[ring->me]; in amdgpu_vcn_ring_begin_use()
469 if (adev->vcn.workload_profile_active) in amdgpu_vcn_ring_begin_use()
472 mutex_lock(&adev->vcn.workload_profile_mutex); in amdgpu_vcn_ring_begin_use()
473 if (!adev->vcn.workload_profile_active) { in amdgpu_vcn_ring_begin_use()
478 adev->vcn.workload_profile_active = true; in amdgpu_vcn_ring_begin_use()
480 mutex_unlock(&adev->vcn.workload_profile_mutex); in amdgpu_vcn_ring_begin_use()
519 !adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_ring_end_use()
520 atomic_dec(&ring->adev->vcn.inst[ring->me].dpg_enc_submission_cnt); in amdgpu_vcn_ring_end_use()
522 atomic_dec(&ring->adev->vcn.inst[ring->me].total_submission_cnt); in amdgpu_vcn_ring_end_use()
524 schedule_delayed_work(&ring->adev->vcn.inst[ring->me].idle_work, in amdgpu_vcn_ring_end_use()
539 WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); in amdgpu_vcn_dec_ring_test_ring()
543 amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.scratch9, 0)); in amdgpu_vcn_dec_ring_test_ring()
547 tmp = RREG32(adev->vcn.inst[ring->me].external.scratch9); in amdgpu_vcn_dec_ring_test_ring()
608 ib->ptr[0] = PACKET0(adev->vcn.inst[ring->me].internal.data0, 0); in amdgpu_vcn_dec_send_msg()
610 ib->ptr[2] = PACKET0(adev->vcn.inst[ring->me].internal.data1, 0); in amdgpu_vcn_dec_send_msg()
612 ib->ptr[4] = PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0); in amdgpu_vcn_dec_send_msg()
615 ib->ptr[i] = PACKET0(adev->vcn.inst[ring->me].internal.nop, 0); in amdgpu_vcn_dec_send_msg()
778 if (adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_dec_sw_send_msg()
791 if (adev->vcn.inst[ring->me].using_unified_queue) { in amdgpu_vcn_dec_sw_send_msg()
810 if (adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_dec_sw_send_msg()
908 if (adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_enc_get_create_msg()
922 if (adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_enc_get_create_msg()
944 if (adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_enc_get_create_msg()
975 if (adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_enc_get_destroy_msg()
989 if (adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_enc_get_destroy_msg()
1011 if (adev->vcn.inst[ring->me].using_unified_queue) in amdgpu_vcn_enc_get_destroy_msg()
1103 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_setup_ucode()
1111 hdr = (const struct common_firmware_header *)adev->vcn.inst[i].fw->data; in amdgpu_vcn_setup_ucode()
1119 adev->firmware.ucode[idx].fw = adev->vcn.inst[i].fw; in amdgpu_vcn_setup_ucode()
1132 struct amdgpu_vcn_inst *vcn; in amdgpu_debugfs_vcn_fwlog_read() local
1138 vcn = file_inode(f)->i_private; in amdgpu_debugfs_vcn_fwlog_read()
1139 if (!vcn) in amdgpu_debugfs_vcn_fwlog_read()
1142 if (!vcn->fw_shared.cpu_addr || !amdgpu_vcnfw_log) in amdgpu_debugfs_vcn_fwlog_read()
1145 log_buf = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_debugfs_vcn_fwlog_read()
1197 struct amdgpu_vcn_inst *vcn) in amdgpu_debugfs_vcn_fwlog_init() argument
1205 debugfs_create_file_size(name, S_IFREG | 0444, root, vcn, in amdgpu_debugfs_vcn_fwlog_init()
1211 void amdgpu_vcn_fwlog_init(struct amdgpu_vcn_inst *vcn) in amdgpu_vcn_fwlog_init() argument
1214 volatile uint32_t *flag = vcn->fw_shared.cpu_addr; in amdgpu_vcn_fwlog_init()
1215 void *fw_log_cpu_addr = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_vcn_fwlog_init()
1216 uint64_t fw_log_gpu_addr = vcn->fw_shared.gpu_addr + vcn->fw_shared.mem_size; in amdgpu_vcn_fwlog_init()
1218 volatile struct amdgpu_fw_shared_fw_logging *fw_log = vcn->fw_shared.cpu_addr in amdgpu_vcn_fwlog_init()
1219 + vcn->fw_shared.log_offset; in amdgpu_vcn_fwlog_init()
1238 struct ras_common_if *ras_if = adev->vcn.ras_if; in amdgpu_vcn_process_poison_irq()
1269 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in amdgpu_vcn_ras_late_init()
1270 if (adev->vcn.harvest_config & (1 << i) || in amdgpu_vcn_ras_late_init()
1271 !adev->vcn.inst[i].ras_poison_irq.funcs) in amdgpu_vcn_ras_late_init()
1274 r = amdgpu_irq_get(adev, &adev->vcn.inst[i].ras_poison_irq, 0); in amdgpu_vcn_ras_late_init()
1291 if (!adev->vcn.ras) in amdgpu_vcn_ras_sw_init()
1294 ras = adev->vcn.ras; in amdgpu_vcn_ras_sw_init()
1304 adev->vcn.ras_if = &ras->ras_block.ras_comm; in amdgpu_vcn_ras_sw_init()
1319 .mc_addr = adev->vcn.inst[inst_idx].dpg_sram_gpu_addr, in amdgpu_vcn_psp_update_sram()
1320 .ucode_size = ((uintptr_t)adev->vcn.inst[inst_idx].dpg_sram_curr_addr - in amdgpu_vcn_psp_update_sram()
1321 (uintptr_t)adev->vcn.inst[inst_idx].dpg_sram_cpu_addr), in amdgpu_vcn_psp_update_sram()
1337 return amdgpu_show_reset_mask(buf, adev->vcn.supported_reset); in amdgpu_get_vcn_reset_mask()
1347 if (adev->vcn.num_vcn_inst) { in amdgpu_vcn_sysfs_reset_mask_init()
1359 if (adev->vcn.num_vcn_inst) in amdgpu_vcn_sysfs_reset_mask_fini()
1379 mask = (1ULL << adev->vcn.num_vcn_inst) - 1; in amdgpu_debugfs_vcn_sched_mask_set()
1382 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in amdgpu_debugfs_vcn_sched_mask_set()
1383 ring = &adev->vcn.inst[i].ring_enc[0]; in amdgpu_debugfs_vcn_sched_mask_set()
1403 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in amdgpu_debugfs_vcn_sched_mask_get()
1404 ring = &adev->vcn.inst[i].ring_enc[0]; in amdgpu_debugfs_vcn_sched_mask_get()
1424 if (adev->vcn.num_vcn_inst <= 1 || !adev->vcn.inst[0].using_unified_queue) in amdgpu_debugfs_vcn_sched_mask_init()
1446 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in vcn_set_powergating_state()
1447 struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i]; in vcn_set_powergating_state()