207 				 le32_to_cpu(hdr->header.ucode_array_offset_bytes));  in amdgpu_gfx_rlc_setup_cp_table()
208 			table_offset = le32_to_cpu(hdr->jt_offset);  in amdgpu_gfx_rlc_setup_cp_table()
209 			table_size = le32_to_cpu(hdr->jt_size);  in amdgpu_gfx_rlc_setup_cp_table()
215 				 le32_to_cpu(hdr->header.ucode_array_offset_bytes));  in amdgpu_gfx_rlc_setup_cp_table()
216 			table_offset = le32_to_cpu(hdr->jt_offset);  in amdgpu_gfx_rlc_setup_cp_table()
217 			table_size = le32_to_cpu(hdr->jt_size);  in amdgpu_gfx_rlc_setup_cp_table()
223 				 le32_to_cpu(hdr->header.ucode_array_offset_bytes));  in amdgpu_gfx_rlc_setup_cp_table()
224 			table_offset = le32_to_cpu(hdr->jt_offset);  in amdgpu_gfx_rlc_setup_cp_table()
225 			table_size = le32_to_cpu(hdr->jt_size);  in amdgpu_gfx_rlc_setup_cp_table()
231 				 le32_to_cpu(hdr->header.ucode_array_offset_bytes));  in amdgpu_gfx_rlc_setup_cp_table()
232 			table_offset = le32_to_cpu(hdr->jt_offset);  in amdgpu_gfx_rlc_setup_cp_table()
233 			table_size = le32_to_cpu(hdr->jt_size);  in amdgpu_gfx_rlc_setup_cp_table()
239 				 le32_to_cpu(hdr->header.ucode_array_offset_bytes));  in amdgpu_gfx_rlc_setup_cp_table()
240 			table_offset = le32_to_cpu(hdr->jt_offset);  in amdgpu_gfx_rlc_setup_cp_table()
241 			table_size = le32_to_cpu(hdr->jt_size);  in amdgpu_gfx_rlc_setup_cp_table()
246 				cpu_to_le32(le32_to_cpu(fw_data[table_offset + i]));  in amdgpu_gfx_rlc_setup_cp_table()
291 	adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);  in amdgpu_gfx_rlc_init_microcode_v2_0()
292 	adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);  in amdgpu_gfx_rlc_init_microcode_v2_0()
294 		le32_to_cpu(rlc_hdr->save_and_restore_offset);  in amdgpu_gfx_rlc_init_microcode_v2_0()
296 		le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);  in amdgpu_gfx_rlc_init_microcode_v2_0()
298 		le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);  in amdgpu_gfx_rlc_init_microcode_v2_0()
300 		le32_to_cpu(rlc_hdr->reg_restore_list_size);  in amdgpu_gfx_rlc_init_microcode_v2_0()
302 		le32_to_cpu(rlc_hdr->reg_list_format_start);  in amdgpu_gfx_rlc_init_microcode_v2_0()
304 		le32_to_cpu(rlc_hdr->reg_list_format_separate_start);  in amdgpu_gfx_rlc_init_microcode_v2_0()
306 		le32_to_cpu(rlc_hdr->starting_offsets_start);  in amdgpu_gfx_rlc_init_microcode_v2_0()
308 		le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_0()
310 		le32_to_cpu(rlc_hdr->reg_list_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_0()
320 			le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));  in amdgpu_gfx_rlc_init_microcode_v2_0()
322 		adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]);  in amdgpu_gfx_rlc_init_microcode_v2_0()
327 			le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));  in amdgpu_gfx_rlc_init_microcode_v2_0()
329 		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);  in amdgpu_gfx_rlc_init_microcode_v2_0()
338 				ALIGN(le32_to_cpu(common_hdr->ucode_size_bytes), PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_0()
351 	adev->gfx.rlc_srlc_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_cntl_ucode_ver);  in amdgpu_gfx_rlc_init_microcode_v2_1()
352 	adev->gfx.rlc_srlc_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_cntl_feature_ver);  in amdgpu_gfx_rlc_init_microcode_v2_1()
353 …adev->gfx.rlc.save_restore_list_cntl_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_cntl_size…  in amdgpu_gfx_rlc_init_microcode_v2_1()
354 …adev->gfx.rlc.save_restore_list_cntl = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_cntl…  in amdgpu_gfx_rlc_init_microcode_v2_1()
355 	adev->gfx.rlc_srlg_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_gpm_ucode_ver);  in amdgpu_gfx_rlc_init_microcode_v2_1()
356 	adev->gfx.rlc_srlg_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_gpm_feature_ver);  in amdgpu_gfx_rlc_init_microcode_v2_1()
357 …adev->gfx.rlc.save_restore_list_gpm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_gpm_size_b…  in amdgpu_gfx_rlc_init_microcode_v2_1()
358 …adev->gfx.rlc.save_restore_list_gpm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_gpm_o…  in amdgpu_gfx_rlc_init_microcode_v2_1()
359 	adev->gfx.rlc_srls_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_srm_ucode_ver);  in amdgpu_gfx_rlc_init_microcode_v2_1()
360 	adev->gfx.rlc_srls_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_srm_feature_ver);  in amdgpu_gfx_rlc_init_microcode_v2_1()
361 …adev->gfx.rlc.save_restore_list_srm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_srm_size_b…  in amdgpu_gfx_rlc_init_microcode_v2_1()
362 …adev->gfx.rlc.save_restore_list_srm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_srm_o…  in amdgpu_gfx_rlc_init_microcode_v2_1()
364 		le32_to_cpu(rlc_hdr->reg_list_format_direct_reg_list_length);  in amdgpu_gfx_rlc_init_microcode_v2_1()
399 	adev->gfx.rlc.rlc_iram_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlc_iram_ucode_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_2()
400 	adev->gfx.rlc.rlc_iram_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlc_iram_ucode_offset_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_2()
401 	adev->gfx.rlc.rlc_dram_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlc_dram_ucode_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_2()
402 	adev->gfx.rlc.rlc_dram_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlc_dram_ucode_offset_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_2()
429 	adev->gfx.rlcp_ucode_version = le32_to_cpu(rlc_hdr->rlcp_ucode_version);  in amdgpu_gfx_rlc_init_microcode_v2_3()
430 	adev->gfx.rlcp_ucode_feature_version = le32_to_cpu(rlc_hdr->rlcp_ucode_feature_version);  in amdgpu_gfx_rlc_init_microcode_v2_3()
431 	adev->gfx.rlc.rlcp_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlcp_ucode_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_3()
432 	adev->gfx.rlc.rlcp_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlcp_ucode_offset_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_3()
434 	adev->gfx.rlcv_ucode_version = le32_to_cpu(rlc_hdr->rlcv_ucode_version);  in amdgpu_gfx_rlc_init_microcode_v2_3()
435 	adev->gfx.rlcv_ucode_feature_version = le32_to_cpu(rlc_hdr->rlcv_ucode_feature_version);  in amdgpu_gfx_rlc_init_microcode_v2_3()
436 	adev->gfx.rlc.rlcv_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlcv_ucode_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_3()
437 	adev->gfx.rlc.rlcv_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlcv_ucode_offset_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_3()
464 …adev->gfx.rlc.global_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->global_tap_delays_ucode_si…  in amdgpu_gfx_rlc_init_microcode_v2_4()
465 …adev->gfx.rlc.global_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->global_tap_delays_uco…  in amdgpu_gfx_rlc_init_microcode_v2_4()
466 …adev->gfx.rlc.se0_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->se0_tap_delays_ucode_size_byt…  in amdgpu_gfx_rlc_init_microcode_v2_4()
467 …adev->gfx.rlc.se0_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->se0_tap_delays_ucode_off…  in amdgpu_gfx_rlc_init_microcode_v2_4()
468 …adev->gfx.rlc.se1_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->se1_tap_delays_ucode_size_byt…  in amdgpu_gfx_rlc_init_microcode_v2_4()
469 …adev->gfx.rlc.se1_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->se1_tap_delays_ucode_off…  in amdgpu_gfx_rlc_init_microcode_v2_4()
470 …adev->gfx.rlc.se2_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->se2_tap_delays_ucode_size_byt…  in amdgpu_gfx_rlc_init_microcode_v2_4()
471 …adev->gfx.rlc.se2_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->se2_tap_delays_ucode_off…  in amdgpu_gfx_rlc_init_microcode_v2_4()
472 …adev->gfx.rlc.se3_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->se3_tap_delays_ucode_size_byt…  in amdgpu_gfx_rlc_init_microcode_v2_4()
473 …adev->gfx.rlc.se3_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->se3_tap_delays_ucode_off…  in amdgpu_gfx_rlc_init_microcode_v2_4()