Lines Matching refs:tbl_hdr
269 __encode_table_header_to_buf(&control->tbl_hdr, buf); in __write_table_header()
362 sz = sizeof(control->tbl_hdr) - sizeof(control->tbl_hdr.checksum); in __calc_hdr_byte_sum()
363 pp = (u8 *) &control->tbl_hdr; in __calc_hdr_byte_sum()
390 struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr; in amdgpu_ras_eeprom_correct_header_tag()
414 struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr; in amdgpu_ras_set_eeprom_table_version()
439 struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr; in amdgpu_ras_eeprom_reset_table()
564 if (con->eeprom_control.tbl_hdr.header == RAS_TABLE_HDR_BAD) { in amdgpu_ras_eeprom_check_err_threshold()
763 control->tbl_hdr.header = RAS_TABLE_HDR_BAD; in amdgpu_ras_eeprom_update_header()
764 if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1) { in amdgpu_ras_eeprom_update_header()
777 if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1) in amdgpu_ras_eeprom_update_header()
778 control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE + in amdgpu_ras_eeprom_update_header()
782 control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE + in amdgpu_ras_eeprom_update_header()
784 control->tbl_hdr.checksum = 0; in amdgpu_ras_eeprom_update_header()
790 control->tbl_hdr.tbl_size); in amdgpu_ras_eeprom_update_header()
817 control->tbl_hdr.version >= RAS_TABLE_VER_V2_1 && in amdgpu_ras_eeprom_update_header()
830 if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1) in amdgpu_ras_eeprom_update_header()
834 control->tbl_hdr.checksum = csum; in amdgpu_ras_eeprom_update_header()
836 if (!res && control->tbl_hdr.version > RAS_TABLE_VER_V1) in amdgpu_ras_eeprom_update_header()
1047 if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1) in amdgpu_ras_eeprom_max_record_count()
1155 control->tbl_hdr.header, in amdgpu_ras_debugfs_table_read()
1156 control->tbl_hdr.version, in amdgpu_ras_debugfs_table_read()
1157 control->tbl_hdr.first_rec_offset, in amdgpu_ras_debugfs_table_read()
1158 control->tbl_hdr.tbl_size, in amdgpu_ras_debugfs_table_read()
1159 control->tbl_hdr.checksum); in amdgpu_ras_debugfs_table_read()
1292 if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1) in __verify_ras_table_checksum()
1364 struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr; in amdgpu_ras_eeprom_init()
1414 struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr; in amdgpu_ras_eeprom_check()