124 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,  in amdgpu_ib_schedule()  argument
128 	struct amdgpu_device *adev = ring->adev;  in amdgpu_ib_schedule()
166 	if (!ring->sched.ready && !ring->is_mes_queue) {  in amdgpu_ib_schedule()
167 		dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name);  in amdgpu_ib_schedule()
171 	if (vm && !job->vmid && !ring->is_mes_queue) {  in amdgpu_ib_schedule()
177 	    (!ring->funcs->secure_submission_supported)) {  in amdgpu_ib_schedule()
178 		dev_err(adev->dev, "secure submissions not supported on ring <%s>\n", ring->name);  in amdgpu_ib_schedule()
182 	alloc_size = ring->funcs->emit_frame_size + num_ibs *  in amdgpu_ib_schedule()
183 		ring->funcs->emit_ib_size;  in amdgpu_ib_schedule()
185 	r = amdgpu_ring_alloc(ring, alloc_size);  in amdgpu_ib_schedule()
191 	need_ctx_switch = ring->current_ctx != fence_ctx;  in amdgpu_ib_schedule()
192 	if (ring->funcs->emit_pipeline_sync && job &&  in amdgpu_ib_schedule()
194 	     need_ctx_switch || amdgpu_vm_need_pipeline_sync(ring, job))) {  in amdgpu_ib_schedule()
204 	if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync)  in amdgpu_ib_schedule()
205 		ring->funcs->emit_mem_sync(ring);  in amdgpu_ib_schedule()
207 	if (ring->funcs->emit_wave_limit &&  in amdgpu_ib_schedule()
208 	    ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH)  in amdgpu_ib_schedule()
209 		ring->funcs->emit_wave_limit(ring, true);  in amdgpu_ib_schedule()
211 	if (ring->funcs->insert_start)  in amdgpu_ib_schedule()
212 		ring->funcs->insert_start(ring);  in amdgpu_ib_schedule()
215 		r = amdgpu_vm_flush(ring, job, need_pipe_sync);  in amdgpu_ib_schedule()
217 			amdgpu_ring_undo(ring);  in amdgpu_ib_schedule()
222 	amdgpu_ring_ib_begin(ring);  in amdgpu_ib_schedule()
224 	if (ring->funcs->emit_gfx_shadow)  in amdgpu_ib_schedule()
225 		amdgpu_ring_emit_gfx_shadow(ring, shadow_va, csa_va, gds_va,  in amdgpu_ib_schedule()
228 	if (ring->funcs->init_cond_exec)  in amdgpu_ib_schedule()
229 		cond_exec = amdgpu_ring_init_cond_exec(ring,  in amdgpu_ib_schedule()
230 						       ring->cond_exe_gpu_addr);  in amdgpu_ib_schedule()
232 	amdgpu_device_flush_hdp(adev, ring);  in amdgpu_ib_schedule()
237 	if (job && ring->funcs->emit_cntxcntl) {  in amdgpu_ib_schedule()
240 		amdgpu_ring_emit_cntxcntl(ring, status);  in amdgpu_ib_schedule()
246 	if (job && ring->funcs->emit_frame_cntl) {  in amdgpu_ib_schedule()
248 		amdgpu_ring_emit_frame_cntl(ring, true, secure);  in amdgpu_ib_schedule()
254 		if (job && ring->funcs->emit_frame_cntl) {  in amdgpu_ib_schedule()
256 				amdgpu_ring_emit_frame_cntl(ring, false, secure);  in amdgpu_ib_schedule()
258 				amdgpu_ring_emit_frame_cntl(ring, true, secure);  in amdgpu_ib_schedule()
262 		amdgpu_ring_emit_ib(ring, job, ib, status);  in amdgpu_ib_schedule()
266 	if (job && ring->funcs->emit_frame_cntl)  in amdgpu_ib_schedule()
267 		amdgpu_ring_emit_frame_cntl(ring, false, secure);  in amdgpu_ib_schedule()
269 	amdgpu_device_invalidate_hdp(adev, ring);  in amdgpu_ib_schedule()
276 		amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence,  in amdgpu_ib_schedule()
280 	if (ring->funcs->emit_gfx_shadow && ring->funcs->init_cond_exec) {  in amdgpu_ib_schedule()
281 		amdgpu_ring_emit_gfx_shadow(ring, 0, 0, 0, false, 0);  in amdgpu_ib_schedule()
282 		amdgpu_ring_init_cond_exec(ring, ring->cond_exe_gpu_addr);  in amdgpu_ib_schedule()
285 	r = amdgpu_fence_emit(ring, f, job, fence_flags);  in amdgpu_ib_schedule()
289 			amdgpu_vmid_reset(adev, ring->vm_hub, job->vmid);  in amdgpu_ib_schedule()
290 		amdgpu_ring_undo(ring);  in amdgpu_ib_schedule()
294 	if (ring->funcs->insert_end)  in amdgpu_ib_schedule()
295 		ring->funcs->insert_end(ring);  in amdgpu_ib_schedule()
297 	amdgpu_ring_patch_cond_exec(ring, cond_exec);  in amdgpu_ib_schedule()
299 	ring->current_ctx = fence_ctx;  in amdgpu_ib_schedule()
300 	if (job && ring->funcs->emit_switch_buffer)  in amdgpu_ib_schedule()
301 		amdgpu_ring_emit_switch_buffer(ring);  in amdgpu_ib_schedule()
303 	if (ring->funcs->emit_wave_limit &&  in amdgpu_ib_schedule()
304 	    ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH)  in amdgpu_ib_schedule()
305 		ring->funcs->emit_wave_limit(ring, false);  in amdgpu_ib_schedule()
307 	amdgpu_ring_ib_end(ring);  in amdgpu_ib_schedule()
308 	amdgpu_ring_commit(ring);  in amdgpu_ib_schedule()
403 		struct amdgpu_ring *ring = adev->rings[i];  in amdgpu_ib_ring_tests()  local
409 		if (!ring->sched.ready || !ring->funcs->test_ib)  in amdgpu_ib_ring_tests()
413 		    ring->funcs->type == AMDGPU_RING_TYPE_KIQ)  in amdgpu_ib_ring_tests()
417 		if (ring->funcs->type == AMDGPU_RING_TYPE_UVD ||  in amdgpu_ib_ring_tests()
418 			ring->funcs->type == AMDGPU_RING_TYPE_VCE ||  in amdgpu_ib_ring_tests()
419 			ring->funcs->type == AMDGPU_RING_TYPE_UVD_ENC ||  in amdgpu_ib_ring_tests()
420 			ring->funcs->type == AMDGPU_RING_TYPE_VCN_DEC ||  in amdgpu_ib_ring_tests()
421 			ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC ||  in amdgpu_ib_ring_tests()
422 			ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG)  in amdgpu_ib_ring_tests()
427 		r = amdgpu_ring_test_ib(ring, tmo);  in amdgpu_ib_ring_tests()
430 				      ring->name);  in amdgpu_ib_ring_tests()
434 		ring->sched.ready = false;  in amdgpu_ib_ring_tests()
436 			  ring->name, r);  in amdgpu_ib_ring_tests()
438 		if (ring == &adev->gfx.gfx_ring[0]) {  in amdgpu_ib_ring_tests()