Lines Matching refs:gfx
51 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
52 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
53 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
62 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_queue_mask_bit_to_mec_queue()
63 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
64 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
65 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
66 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
74 adev->gfx.mec_bitmap[xcc_id].queue_bitmap); in amdgpu_gfx_is_mec_queue_enabled()
82 bit += me * adev->gfx.me.num_pipe_per_me in amdgpu_gfx_me_queue_to_bit()
83 * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()
84 bit += pipe * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()
94 adev->gfx.me.queue_bitmap); in amdgpu_gfx_is_me_queue_enabled()
144 return amdgpu_async_gfx_ring && adev->gfx.me.num_pipe_per_me > 1; in amdgpu_gfx_is_graphics_multipipe_capable()
163 return adev->gfx.mec.num_mec > 1; in amdgpu_gfx_is_compute_multipipe_capable()
176 adev->gfx.num_gfx_rings > 1 && pipe == 1 && queue == 0) { in amdgpu_gfx_is_high_priority_graphics_queue()
181 if (ring == &adev->gfx.gfx_ring[bit]) in amdgpu_gfx_is_high_priority_graphics_queue()
194 if (adev->gfx.num_compute_rings > 1 && in amdgpu_gfx_is_high_priority_compute_queue()
195 ring == &adev->gfx.compute_ring[0]) in amdgpu_gfx_is_high_priority_compute_queue()
205 int max_queues_per_mec = min(adev->gfx.mec.num_pipe_per_mec * in amdgpu_gfx_compute_queue_acquire()
206 adev->gfx.mec.num_queue_per_pipe, in amdgpu_gfx_compute_queue_acquire()
207 adev->gfx.num_compute_rings); in amdgpu_gfx_compute_queue_acquire()
208 int num_xcc = adev->gfx.xcc_mask ? NUM_XCC(adev->gfx.xcc_mask) : 1; in amdgpu_gfx_compute_queue_acquire()
215 pipe = i % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
216 queue = (i / adev->gfx.mec.num_pipe_per_mec) % in amdgpu_gfx_compute_queue_acquire()
217 adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_compute_queue_acquire()
219 set_bit(pipe * adev->gfx.mec.num_queue_per_pipe + queue, in amdgpu_gfx_compute_queue_acquire()
220 adev->gfx.mec_bitmap[j].queue_bitmap); in amdgpu_gfx_compute_queue_acquire()
227 set_bit(i, adev->gfx.mec_bitmap[j].queue_bitmap); in amdgpu_gfx_compute_queue_acquire()
233 bitmap_weight(adev->gfx.mec_bitmap[j].queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES)); in amdgpu_gfx_compute_queue_acquire()
241 int max_queues_per_me = adev->gfx.me.num_pipe_per_me * in amdgpu_gfx_graphics_queue_acquire()
242 adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_graphics_queue_acquire()
248 pipe = i % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_graphics_queue_acquire()
249 queue = (i / adev->gfx.me.num_pipe_per_me) % in amdgpu_gfx_graphics_queue_acquire()
250 adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_graphics_queue_acquire()
252 set_bit(pipe * adev->gfx.me.num_queue_per_pipe + queue, in amdgpu_gfx_graphics_queue_acquire()
253 adev->gfx.me.queue_bitmap); in amdgpu_gfx_graphics_queue_acquire()
257 set_bit(i, adev->gfx.me.queue_bitmap); in amdgpu_gfx_graphics_queue_acquire()
261 adev->gfx.num_gfx_rings = in amdgpu_gfx_graphics_queue_acquire()
262 bitmap_weight(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES); in amdgpu_gfx_graphics_queue_acquire()
271 queue_bit = adev->gfx.mec.num_mec in amdgpu_gfx_kiq_acquire()
272 * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_kiq_acquire()
273 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_kiq_acquire()
276 if (test_bit(queue_bit, adev->gfx.mec_bitmap[xcc_id].queue_bitmap)) in amdgpu_gfx_kiq_acquire()
302 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init_ring()
343 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_fini()
353 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init()
379 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mqd_sw_init()
418 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_mqd_sw_init()
419 ring = &adev->gfx.gfx_ring[i]; in amdgpu_gfx_mqd_sw_init()
431 adev->gfx.me.mqd_backup[i] = kzalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
432 if (!adev->gfx.me.mqd_backup[i]) { in amdgpu_gfx_mqd_sw_init()
441 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_init()
442 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_mqd_sw_init()
443 ring = &adev->gfx.compute_ring[j]; in amdgpu_gfx_mqd_sw_init()
455 adev->gfx.mec.mqd_backup[j] = kzalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
456 if (!adev->gfx.mec.mqd_backup[j]) { in amdgpu_gfx_mqd_sw_init()
470 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mqd_sw_fini()
473 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_mqd_sw_fini()
474 ring = &adev->gfx.gfx_ring[i]; in amdgpu_gfx_mqd_sw_fini()
475 kfree(adev->gfx.me.mqd_backup[i]); in amdgpu_gfx_mqd_sw_fini()
482 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_fini()
483 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_mqd_sw_fini()
484 ring = &adev->gfx.compute_ring[j]; in amdgpu_gfx_mqd_sw_fini()
485 kfree(adev->gfx.mec.mqd_backup[j]); in amdgpu_gfx_mqd_sw_fini()
500 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_disable_kcq()
506 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_disable_kcq()
507 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_disable_kcq()
509 &adev->gfx.compute_ring[j], in amdgpu_gfx_disable_kcq()
523 adev->gfx.num_compute_rings)) { in amdgpu_gfx_disable_kcq()
528 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_disable_kcq()
529 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_disable_kcq()
531 &adev->gfx.compute_ring[j], in amdgpu_gfx_disable_kcq()
550 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_disable_kgq()
557 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_disable_kgq()
558 j = i + xcc_id * adev->gfx.num_gfx_rings; in amdgpu_gfx_disable_kgq()
560 &adev->gfx.gfx_ring[j], in amdgpu_gfx_disable_kgq()
570 if (!adev->gfx.kiq[0].ring.sched.ready || amdgpu_in_reset(adev)) in amdgpu_gfx_disable_kgq()
576 adev->gfx.num_gfx_rings)) { in amdgpu_gfx_disable_kgq()
581 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_disable_kgq()
582 j = i + xcc_id * adev->gfx.num_gfx_rings; in amdgpu_gfx_disable_kgq()
584 &adev->gfx.gfx_ring[j], in amdgpu_gfx_disable_kgq()
617 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mes_enable_kcq()
640 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mes_enable_kcq()
641 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_mes_enable_kcq()
643 &adev->gfx.compute_ring[j]); in amdgpu_gfx_mes_enable_kcq()
655 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_enable_kcq()
667 if (!test_bit(i, adev->gfx.mec_bitmap[xcc_id].queue_bitmap)) in amdgpu_gfx_enable_kcq()
688 adev->gfx.num_compute_rings + in amdgpu_gfx_enable_kcq()
697 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_enable_kcq()
698 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_enable_kcq()
700 &adev->gfx.compute_ring[j]); in amdgpu_gfx_enable_kcq()
719 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_enable_kgq()
729 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_enable_kgq()
730 j = i + xcc_id * adev->gfx.num_gfx_rings; in amdgpu_gfx_enable_kgq()
732 &adev->gfx.gfx_ring[j]); in amdgpu_gfx_enable_kgq()
746 adev->gfx.num_gfx_rings); in amdgpu_gfx_enable_kgq()
753 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_enable_kgq()
754 j = i + xcc_id * adev->gfx.num_gfx_rings; in amdgpu_gfx_enable_kgq()
756 &adev->gfx.gfx_ring[j]); in amdgpu_gfx_enable_kgq()
782 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_gfx_do_off_ctrl()
789 if (WARN_ON_ONCE(adev->gfx.gfx_off_req_count == 0)) in amdgpu_gfx_do_off_ctrl()
792 adev->gfx.gfx_off_req_count--; in amdgpu_gfx_do_off_ctrl()
794 if (adev->gfx.gfx_off_req_count == 0 && in amdgpu_gfx_do_off_ctrl()
795 !adev->gfx.gfx_off_state) { in amdgpu_gfx_do_off_ctrl()
800 adev->gfx.gfx_off_state = true; in amdgpu_gfx_do_off_ctrl()
802 schedule_delayed_work(&adev->gfx.gfx_off_delay_work, in amdgpu_gfx_do_off_ctrl()
807 if (adev->gfx.gfx_off_req_count == 0) { in amdgpu_gfx_do_off_ctrl()
808 cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work); in amdgpu_gfx_do_off_ctrl()
810 if (adev->gfx.gfx_off_state && in amdgpu_gfx_do_off_ctrl()
812 adev->gfx.gfx_off_state = false; in amdgpu_gfx_do_off_ctrl()
814 if (adev->gfx.funcs->init_spm_golden) { in amdgpu_gfx_do_off_ctrl()
822 adev->gfx.gfx_off_req_count++; in amdgpu_gfx_do_off_ctrl()
826 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_gfx_do_off_ctrl()
870 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_set_gfx_off_residency()
874 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_set_gfx_off_residency()
883 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_residency()
887 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_residency()
896 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_entrycount()
900 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_entrycount()
910 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_status()
914 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_status()
937 if (adev->gfx.cp_ecc_error_irq.funcs) { in amdgpu_gfx_ras_late_init()
938 r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); in amdgpu_gfx_ras_late_init()
960 if (!adev->gfx.ras) in amdgpu_gfx_ras_sw_init()
963 ras = adev->gfx.ras; in amdgpu_gfx_ras_sw_init()
974 adev->gfx.ras_if = &ras->ras_block.ras_comm; in amdgpu_gfx_ras_sw_init()
990 if (adev->gfx.ras && adev->gfx.ras->poison_consumption_handler) in amdgpu_gfx_poison_consumption_handler()
991 return adev->gfx.ras->poison_consumption_handler(adev, entry); in amdgpu_gfx_poison_consumption_handler()
1008 if (adev->gfx.ras && adev->gfx.ras->ras_block.hw_ops && in amdgpu_gfx_process_ras_data_cb()
1009 adev->gfx.ras->ras_block.hw_ops->query_ras_error_count) in amdgpu_gfx_process_ras_data_cb()
1010 adev->gfx.ras->ras_block.hw_ops->query_ras_error_count(adev, err_data); in amdgpu_gfx_process_ras_data_cb()
1020 struct ras_common_if *ras_if = adev->gfx.ras_if; in amdgpu_gfx_cp_ecc_error_irq()
1041 int num_xcc = adev->gfx.xcc_mask ? NUM_XCC(adev->gfx.xcc_mask) : 1; in amdgpu_gfx_ras_error_func()
1059 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_kiq_rreg()
1130 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_kiq_wreg()
1212 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
1213 adev->gfx.pfp_fw_version = in amdgpu_gfx_cp_init_microcode()
1215 adev->gfx.pfp_feature_version = in amdgpu_gfx_cp_init_microcode()
1217 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
1222 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
1223 adev->gfx.pfp_fw_version = in amdgpu_gfx_cp_init_microcode()
1225 adev->gfx.pfp_feature_version = in amdgpu_gfx_cp_init_microcode()
1227 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
1233 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
1234 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
1239 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
1240 adev->gfx.me_fw_version = in amdgpu_gfx_cp_init_microcode()
1242 adev->gfx.me_feature_version = in amdgpu_gfx_cp_init_microcode()
1244 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
1249 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
1250 adev->gfx.me_fw_version = in amdgpu_gfx_cp_init_microcode()
1252 adev->gfx.me_feature_version = in amdgpu_gfx_cp_init_microcode()
1254 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
1260 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
1261 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
1266 adev->gfx.ce_fw->data; in amdgpu_gfx_cp_init_microcode()
1267 adev->gfx.ce_fw_version = in amdgpu_gfx_cp_init_microcode()
1269 adev->gfx.ce_feature_version = in amdgpu_gfx_cp_init_microcode()
1271 ucode_fw = adev->gfx.ce_fw; in amdgpu_gfx_cp_init_microcode()
1276 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1277 adev->gfx.mec_fw_version = in amdgpu_gfx_cp_init_microcode()
1279 adev->gfx.mec_feature_version = in amdgpu_gfx_cp_init_microcode()
1281 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1287 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1288 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1293 adev->gfx.mec2_fw->data; in amdgpu_gfx_cp_init_microcode()
1294 adev->gfx.mec2_fw_version = in amdgpu_gfx_cp_init_microcode()
1296 adev->gfx.mec2_feature_version = in amdgpu_gfx_cp_init_microcode()
1298 ucode_fw = adev->gfx.mec2_fw; in amdgpu_gfx_cp_init_microcode()
1304 adev->gfx.mec2_fw->data; in amdgpu_gfx_cp_init_microcode()
1305 ucode_fw = adev->gfx.mec2_fw; in amdgpu_gfx_cp_init_microcode()
1310 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1311 adev->gfx.mec_fw_version = in amdgpu_gfx_cp_init_microcode()
1313 adev->gfx.mec_feature_version = in amdgpu_gfx_cp_init_microcode()
1315 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1323 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1324 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1342 return !(xcc_id % (adev->gfx.num_xcc_per_xcp ? in amdgpu_gfx_is_master_xcc()
1343 adev->gfx.num_xcc_per_xcp : 1)); in amdgpu_gfx_is_master_xcc()
1369 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in amdgpu_gfx_set_compute_partition()
1493 int num_xcc = NUM_XCC(adev->gfx.xcc_mask); in amdgpu_gfx_run_cleaner_shader()
1498 if (adev->gfx.num_xcc_per_xcp) in amdgpu_gfx_run_cleaner_shader()
1499 num_xcc_to_clear = adev->gfx.num_xcc_per_xcp; in amdgpu_gfx_run_cleaner_shader()
1504 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_run_cleaner_shader()
1505 ring = &adev->gfx.compute_ring[i + xcc_id * adev->gfx.num_compute_rings]; in amdgpu_gfx_run_cleaner_shader()
1695 return amdgpu_show_reset_mask(buf, adev->gfx.gfx_supported_reset); in amdgpu_gfx_get_gfx_reset_mask()
1708 return amdgpu_show_reset_mask(buf, adev->gfx.compute_supported_reset); in amdgpu_gfx_get_compute_reset_mask()
1781 if (adev->gfx.enable_cleaner_shader) in amdgpu_gfx_sysfs_isolation_shader_init()
1790 if (adev->gfx.enable_cleaner_shader) in amdgpu_gfx_sysfs_isolation_shader_fini()
1801 if (adev->gfx.num_gfx_rings) { in amdgpu_gfx_sysfs_reset_mask_init()
1807 if (adev->gfx.num_compute_rings) { in amdgpu_gfx_sysfs_reset_mask_init()
1821 if (adev->gfx.num_gfx_rings) in amdgpu_gfx_sysfs_reset_mask_fini()
1824 if (adev->gfx.num_compute_rings) in amdgpu_gfx_sysfs_reset_mask_fini()
1861 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_cleaner_shader_sw_init()
1866 &adev->gfx.cleaner_shader_obj, in amdgpu_gfx_cleaner_shader_sw_init()
1867 &adev->gfx.cleaner_shader_gpu_addr, in amdgpu_gfx_cleaner_shader_sw_init()
1868 (void **)&adev->gfx.cleaner_shader_cpu_ptr); in amdgpu_gfx_cleaner_shader_sw_init()
1873 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_cleaner_shader_sw_fini()
1876 amdgpu_bo_free_kernel(&adev->gfx.cleaner_shader_obj, in amdgpu_gfx_cleaner_shader_sw_fini()
1877 &adev->gfx.cleaner_shader_gpu_addr, in amdgpu_gfx_cleaner_shader_sw_fini()
1878 (void **)&adev->gfx.cleaner_shader_cpu_ptr); in amdgpu_gfx_cleaner_shader_sw_fini()
1885 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_cleaner_shader_init()
1888 if (adev->gfx.cleaner_shader_cpu_ptr && cleaner_shader_ptr) in amdgpu_gfx_cleaner_shader_init()
1889 memcpy_toio(adev->gfx.cleaner_shader_cpu_ptr, cleaner_shader_ptr, in amdgpu_gfx_cleaner_shader_init()
1926 mutex_lock(&adev->gfx.kfd_sch_mutex); in amdgpu_gfx_kfd_sch_ctrl()
1933 if (WARN_ON_ONCE(adev->gfx.kfd_sch_req_count[idx] == 0)) { in amdgpu_gfx_kfd_sch_ctrl()
1938 adev->gfx.kfd_sch_req_count[idx]--; in amdgpu_gfx_kfd_sch_ctrl()
1940 if (adev->gfx.kfd_sch_req_count[idx] == 0 && in amdgpu_gfx_kfd_sch_ctrl()
1941 adev->gfx.kfd_sch_inactive[idx]) { in amdgpu_gfx_kfd_sch_ctrl()
1942 schedule_delayed_work(&adev->gfx.enforce_isolation[idx].work, in amdgpu_gfx_kfd_sch_ctrl()
1943 msecs_to_jiffies(adev->gfx.enforce_isolation_time[idx])); in amdgpu_gfx_kfd_sch_ctrl()
1946 if (adev->gfx.kfd_sch_req_count[idx] == 0) { in amdgpu_gfx_kfd_sch_ctrl()
1947 cancel_delayed_work_sync(&adev->gfx.enforce_isolation[idx].work); in amdgpu_gfx_kfd_sch_ctrl()
1948 if (!adev->gfx.kfd_sch_inactive[idx]) { in amdgpu_gfx_kfd_sch_ctrl()
1950 adev->gfx.kfd_sch_inactive[idx] = true; in amdgpu_gfx_kfd_sch_ctrl()
1954 adev->gfx.kfd_sch_req_count[idx]++; in amdgpu_gfx_kfd_sch_ctrl()
1958 mutex_unlock(&adev->gfx.kfd_sch_mutex); in amdgpu_gfx_kfd_sch_ctrl()
1990 if (isolation_work->xcp_id == adev->gfx.gfx_ring[i].xcp_id) in amdgpu_gfx_enforce_isolation_handler()
1991 fences += amdgpu_fence_count_emitted(&adev->gfx.gfx_ring[i]); in amdgpu_gfx_enforce_isolation_handler()
1994 if (isolation_work->xcp_id == adev->gfx.compute_ring[i].xcp_id) in amdgpu_gfx_enforce_isolation_handler()
1995 fences += amdgpu_fence_count_emitted(&adev->gfx.compute_ring[i]); in amdgpu_gfx_enforce_isolation_handler()
1999 schedule_delayed_work(&adev->gfx.enforce_isolation[idx].work, in amdgpu_gfx_enforce_isolation_handler()
2004 WARN_ON_ONCE(!adev->gfx.kfd_sch_inactive[idx]); in amdgpu_gfx_enforce_isolation_handler()
2005 WARN_ON_ONCE(adev->gfx.kfd_sch_req_count[idx]); in amdgpu_gfx_enforce_isolation_handler()
2007 adev->gfx.kfd_sch_inactive[idx] = false; in amdgpu_gfx_enforce_isolation_handler()
2034 if (!adev->gfx.enforce_isolation_jiffies[idx]) { in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2035 adev->gfx.enforce_isolation_jiffies[idx] = jiffies; in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2036 adev->gfx.enforce_isolation_time[idx] = GFX_SLICE_PERIOD_MS; in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2041 if (time_after(cjiffies, adev->gfx.enforce_isolation_jiffies[idx])) { in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2042 cjiffies -= adev->gfx.enforce_isolation_jiffies[idx]; in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2047 adev->gfx.enforce_isolation_time[idx] = GFX_SLICE_PERIOD_MS; in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2050 adev->gfx.enforce_isolation_time[idx] = in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2055 adev->gfx.enforce_isolation_jiffies[idx] = jiffies; in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2059 adev->gfx.enforce_isolation_jiffies[idx] = jiffies; in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2060 adev->gfx.enforce_isolation_time[idx] = GFX_SLICE_PERIOD_MS; in amdgpu_gfx_enforce_isolation_wait_for_kfd()
2084 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_enforce_isolation_ring_begin_use()
2124 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_enforce_isolation_ring_end_use()
2149 container_of(work, struct amdgpu_device, gfx.idle_work.work); in amdgpu_gfx_profile_idle_work_handler()
2154 if (adev->gfx.num_gfx_rings) in amdgpu_gfx_profile_idle_work_handler()
2160 fences += amdgpu_fence_count_emitted(&adev->gfx.gfx_ring[i]); in amdgpu_gfx_profile_idle_work_handler()
2162 fences += amdgpu_fence_count_emitted(&adev->gfx.compute_ring[i]); in amdgpu_gfx_profile_idle_work_handler()
2163 if (!fences && !atomic_read(&adev->gfx.total_submission_cnt)) { in amdgpu_gfx_profile_idle_work_handler()
2164 mutex_lock(&adev->gfx.workload_profile_mutex); in amdgpu_gfx_profile_idle_work_handler()
2165 if (adev->gfx.workload_profile_active) { in amdgpu_gfx_profile_idle_work_handler()
2171 adev->gfx.workload_profile_active = false; in amdgpu_gfx_profile_idle_work_handler()
2173 mutex_unlock(&adev->gfx.workload_profile_mutex); in amdgpu_gfx_profile_idle_work_handler()
2175 schedule_delayed_work(&adev->gfx.idle_work, GFX_PROFILE_IDLE_TIMEOUT); in amdgpu_gfx_profile_idle_work_handler()
2185 if (adev->gfx.num_gfx_rings) in amdgpu_gfx_profile_ring_begin_use()
2190 atomic_inc(&adev->gfx.total_submission_cnt); in amdgpu_gfx_profile_ring_begin_use()
2192 cancel_delayed_work_sync(&adev->gfx.idle_work); in amdgpu_gfx_profile_ring_begin_use()
2198 if (adev->gfx.workload_profile_active) in amdgpu_gfx_profile_ring_begin_use()
2201 mutex_lock(&adev->gfx.workload_profile_mutex); in amdgpu_gfx_profile_ring_begin_use()
2202 if (!adev->gfx.workload_profile_active) { in amdgpu_gfx_profile_ring_begin_use()
2208 adev->gfx.workload_profile_active = true; in amdgpu_gfx_profile_ring_begin_use()
2210 mutex_unlock(&adev->gfx.workload_profile_mutex); in amdgpu_gfx_profile_ring_begin_use()
2215 atomic_dec(&ring->adev->gfx.total_submission_cnt); in amdgpu_gfx_profile_ring_end_use()
2217 schedule_delayed_work(&ring->adev->gfx.idle_work, GFX_PROFILE_IDLE_TIMEOUT); in amdgpu_gfx_profile_ring_end_use()
2234 mask = (1ULL << adev->gfx.num_gfx_rings) - 1; in amdgpu_debugfs_gfx_sched_mask_set()
2238 for (i = 0; i < adev->gfx.num_gfx_rings; ++i) { in amdgpu_debugfs_gfx_sched_mask_set()
2239 ring = &adev->gfx.gfx_ring[i]; in amdgpu_debugfs_gfx_sched_mask_set()
2259 for (i = 0; i < adev->gfx.num_gfx_rings; ++i) { in amdgpu_debugfs_gfx_sched_mask_get()
2260 ring = &adev->gfx.gfx_ring[i]; in amdgpu_debugfs_gfx_sched_mask_get()
2282 if (!(adev->gfx.num_gfx_rings > 1)) in amdgpu_debugfs_gfx_sched_mask_init()
2304 mask = (1ULL << adev->gfx.num_compute_rings) - 1; in amdgpu_debugfs_compute_sched_mask_set()
2308 for (i = 0; i < adev->gfx.num_compute_rings; ++i) { in amdgpu_debugfs_compute_sched_mask_set()
2309 ring = &adev->gfx.compute_ring[i]; in amdgpu_debugfs_compute_sched_mask_set()
2330 for (i = 0; i < adev->gfx.num_compute_rings; ++i) { in amdgpu_debugfs_compute_sched_mask_get()
2331 ring = &adev->gfx.compute_ring[i]; in amdgpu_debugfs_compute_sched_mask_get()
2353 if (!(adev->gfx.num_compute_rings > 1)) in amdgpu_debugfs_compute_sched_mask_init()