Lines Matching refs:adev
244 static int amdgpu_discovery_read_binary_from_sysmem(struct amdgpu_device *adev, uint8_t *binary) in amdgpu_discovery_read_binary_from_sysmem() argument
250 ret = amdgpu_acpi_get_tmr_info(adev, &tmr_offset, &tmr_size); in amdgpu_discovery_read_binary_from_sysmem()
257 discv_regn = memremap(pos, adev->mman.discovery_tmr_size, MEMREMAP_WC); in amdgpu_discovery_read_binary_from_sysmem()
259 memcpy(binary, discv_regn, adev->mman.discovery_tmr_size); in amdgpu_discovery_read_binary_from_sysmem()
270 static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev, in amdgpu_discovery_read_binary_from_mem() argument
277 if (!amdgpu_sriov_vf(adev)) { in amdgpu_discovery_read_binary_from_mem()
298 amdgpu_device_vram_access(adev, pos, (uint32_t *)binary, in amdgpu_discovery_read_binary_from_mem()
299 adev->mman.discovery_tmr_size, false); in amdgpu_discovery_read_binary_from_mem()
301 ret = amdgpu_discovery_read_binary_from_sysmem(adev, binary); in amdgpu_discovery_read_binary_from_mem()
307 static int amdgpu_discovery_read_binary_from_file(struct amdgpu_device *adev, in amdgpu_discovery_read_binary_from_file() argument
314 r = request_firmware(&fw, fw_name, adev->dev); in amdgpu_discovery_read_binary_from_file()
316 dev_err(adev->dev, "can't load firmware \"%s\"\n", in amdgpu_discovery_read_binary_from_file()
352 static void amdgpu_discovery_harvest_config_quirk(struct amdgpu_device *adev) in amdgpu_discovery_harvest_config_quirk() argument
358 if ((amdgpu_ip_version(adev, UVD_HWIP, 1) == IP_VERSION(3, 0, 1)) && in amdgpu_discovery_harvest_config_quirk()
359 (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(10, 3, 2))) { in amdgpu_discovery_harvest_config_quirk()
360 switch (adev->pdev->revision) { in amdgpu_discovery_harvest_config_quirk()
368 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
369 adev->vcn.inst_mask &= ~AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
377 static int amdgpu_discovery_verify_npsinfo(struct amdgpu_device *adev, in amdgpu_discovery_verify_npsinfo() argument
389 (struct nps_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_verify_npsinfo()
392 dev_dbg(adev->dev, "invalid ip discovery nps info table id\n"); in amdgpu_discovery_verify_npsinfo()
396 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_verify_npsinfo()
399 dev_dbg(adev->dev, "invalid nps info data table checksum\n"); in amdgpu_discovery_verify_npsinfo()
406 static const char *amdgpu_discovery_get_fw_name(struct amdgpu_device *adev) in amdgpu_discovery_get_fw_name() argument
411 switch (adev->asic_type) { in amdgpu_discovery_get_fw_name()
417 if (adev->apu_flags & AMD_APU_IS_RAVEN2) in amdgpu_discovery_get_fw_name()
419 else if (adev->apu_flags & AMD_APU_IS_PICASSO) in amdgpu_discovery_get_fw_name()
434 static int amdgpu_discovery_init(struct amdgpu_device *adev) in amdgpu_discovery_init() argument
444 adev->mman.discovery_tmr_size = DISCOVERY_TMR_SIZE; in amdgpu_discovery_init()
445 adev->mman.discovery_bin = kzalloc(adev->mman.discovery_tmr_size, GFP_KERNEL); in amdgpu_discovery_init()
446 if (!adev->mman.discovery_bin) in amdgpu_discovery_init()
450 fw_name = amdgpu_discovery_get_fw_name(adev); in amdgpu_discovery_init()
452 dev_info(adev->dev, "use ip discovery information from file"); in amdgpu_discovery_init()
453 r = amdgpu_discovery_read_binary_from_file(adev, adev->mman.discovery_bin, fw_name); in amdgpu_discovery_init()
456 dev_err(adev->dev, "failed to read ip discovery binary from file\n"); in amdgpu_discovery_init()
463 adev, adev->mman.discovery_bin); in amdgpu_discovery_init()
469 if (!amdgpu_discovery_verify_binary_signature(adev->mman.discovery_bin)) { in amdgpu_discovery_init()
470 dev_err(adev->dev, in amdgpu_discovery_init()
476 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_init()
483 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
485 dev_err(adev->dev, "invalid ip discovery binary checksum\n"); in amdgpu_discovery_init()
496 (struct ip_discovery_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
498 dev_err(adev->dev, "invalid ip discovery data table signature\n"); in amdgpu_discovery_init()
503 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
505 dev_err(adev->dev, "invalid ip discovery data table checksum\n"); in amdgpu_discovery_init()
517 (struct gpu_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
520 dev_err(adev->dev, "invalid ip discovery gc table id\n"); in amdgpu_discovery_init()
525 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
527 dev_err(adev->dev, "invalid gc data table checksum\n"); in amdgpu_discovery_init()
539 (struct harvest_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
542 dev_err(adev->dev, "invalid ip discovery harvest table signature\n"); in amdgpu_discovery_init()
547 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
549 dev_err(adev->dev, "invalid harvest data table checksum\n"); in amdgpu_discovery_init()
561 (struct vcn_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
564 dev_err(adev->dev, "invalid ip discovery vcn table id\n"); in amdgpu_discovery_init()
569 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
571 dev_err(adev->dev, "invalid vcn data table checksum\n"); in amdgpu_discovery_init()
583 (struct mall_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
586 dev_err(adev->dev, "invalid ip discovery mall table id\n"); in amdgpu_discovery_init()
591 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
593 dev_err(adev->dev, "invalid mall data table checksum\n"); in amdgpu_discovery_init()
602 kfree(adev->mman.discovery_bin); in amdgpu_discovery_init()
603 adev->mman.discovery_bin = NULL; in amdgpu_discovery_init()
606 amdgpu_ras_query_boot_status(adev, 4); in amdgpu_discovery_init()
610 static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev);
612 void amdgpu_discovery_fini(struct amdgpu_device *adev) in amdgpu_discovery_fini() argument
614 amdgpu_discovery_sysfs_fini(adev); in amdgpu_discovery_fini()
615 kfree(adev->mman.discovery_bin); in amdgpu_discovery_fini()
616 adev->mman.discovery_bin = NULL; in amdgpu_discovery_fini()
619 static int amdgpu_discovery_validate_ip(struct amdgpu_device *adev, in amdgpu_discovery_validate_ip() argument
623 dev_err(adev->dev, in amdgpu_discovery_validate_ip()
629 dev_err(adev->dev, in amdgpu_discovery_validate_ip()
638 static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev, in amdgpu_discovery_read_harvest_bit_per_ip() argument
650 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_read_harvest_bit_per_ip()
651 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_read_harvest_bit_per_ip()
658 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_read_harvest_bit_per_ip()
663 ip = (struct ip *)(adev->mman.discovery_bin + in amdgpu_discovery_read_harvest_bit_per_ip()
667 if (amdgpu_discovery_validate_ip(adev, inst, hw_id)) in amdgpu_discovery_read_harvest_bit_per_ip()
675 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN0; in amdgpu_discovery_read_harvest_bit_per_ip()
676 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
678 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
681 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_read_harvest_bit_per_ip()
682 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
684 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
689 adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; in amdgpu_discovery_read_harvest_bit_per_ip()
702 static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev, in amdgpu_discovery_read_from_harvest_table() argument
712 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_read_from_harvest_table()
716 dev_err(adev->dev, "invalid harvest table offset\n"); in amdgpu_discovery_read_from_harvest_table()
720 harvest_info = (struct harvest_table *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_read_from_harvest_table()
729 adev->vcn.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
731 adev->jpeg.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
734 adev->vcn.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
736 adev->jpeg.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
740 adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; in amdgpu_discovery_read_from_harvest_table()
748 adev->gfx.xcc_mask &= in amdgpu_discovery_read_from_harvest_table()
752 adev->sdma.sdma_mask &= in amdgpu_discovery_read_from_harvest_table()
757 adev->isp.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
766 adev->umc.active_mask = ((1 << adev->umc.node_inst_num) - 1) & in amdgpu_discovery_read_from_harvest_table()
998 struct amdgpu_device *adev; member
1014 struct amdgpu_device *adev = ip_top->adev; in ip_disc_release() local
1016 adev->ip_top = NULL; in ip_disc_release()
1020 static uint8_t amdgpu_discovery_get_harvest_info(struct amdgpu_device *adev, in amdgpu_discovery_get_harvest_info() argument
1028 harvest = ((1 << inst) & adev->vcn.inst_mask) == 0; in amdgpu_discovery_get_harvest_info()
1031 if (adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK) in amdgpu_discovery_get_harvest_info()
1038 harvest = ((1 << inst) & adev->gfx.xcc_mask) == 0; in amdgpu_discovery_get_harvest_info()
1041 harvest = ((1 << inst) & adev->sdma.sdma_mask) == 0; in amdgpu_discovery_get_harvest_info()
1050 static int amdgpu_discovery_sysfs_ips(struct amdgpu_device *adev, in amdgpu_discovery_sysfs_ips() argument
1072 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_sysfs_ips()
1075 if (amdgpu_discovery_validate_ip(adev, inst, hw_id) || in amdgpu_discovery_sysfs_ips()
1128 adev, ip_hw_instance->hw_id, in amdgpu_discovery_sysfs_ips()
1157 static int amdgpu_discovery_sysfs_recurse(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_recurse() argument
1162 struct kset *die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_recurse()
1167 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_sysfs_recurse()
1168 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_sysfs_recurse()
1178 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_sysfs_recurse()
1204 amdgpu_discovery_sysfs_ips(adev, ip_die_entry, ip_offset, num_ips, !!ihdr->base_addr_64_bit); in amdgpu_discovery_sysfs_recurse()
1210 static int amdgpu_discovery_sysfs_init(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_init() argument
1215 if (!adev->mman.discovery_bin) in amdgpu_discovery_sysfs_init()
1218 adev->ip_top = kzalloc(sizeof(*adev->ip_top), GFP_KERNEL); in amdgpu_discovery_sysfs_init()
1219 if (!adev->ip_top) in amdgpu_discovery_sysfs_init()
1222 adev->ip_top->adev = adev; in amdgpu_discovery_sysfs_init()
1224 res = kobject_init_and_add(&adev->ip_top->kobj, &ip_discovery_ktype, in amdgpu_discovery_sysfs_init()
1225 &adev->dev->kobj, "ip_discovery"); in amdgpu_discovery_sysfs_init()
1231 die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_init()
1233 die_kset->kobj.parent = &adev->ip_top->kobj; in amdgpu_discovery_sysfs_init()
1235 res = kset_register(&adev->ip_top->die_kset); in amdgpu_discovery_sysfs_init()
1245 res = amdgpu_discovery_sysfs_recurse(adev); in amdgpu_discovery_sysfs_init()
1249 kobject_put(&adev->ip_top->kobj); in amdgpu_discovery_sysfs_init()
1292 static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_fini() argument
1297 die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_fini()
1306 kobject_put(&adev->ip_top->die_kset.kobj); in amdgpu_discovery_sysfs_fini()
1307 kobject_put(&adev->ip_top->kobj); in amdgpu_discovery_sysfs_fini()
1312 static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev) in amdgpu_discovery_reg_base_init() argument
1330 r = amdgpu_discovery_init(adev); in amdgpu_discovery_reg_base_init()
1337 adev->gfx.xcc_mask = 0; in amdgpu_discovery_reg_base_init()
1338 adev->sdma.sdma_mask = 0; in amdgpu_discovery_reg_base_init()
1339 adev->vcn.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1340 adev->jpeg.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1341 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_reg_base_init()
1342 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_reg_base_init()
1350 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_reg_base_init()
1364 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_reg_base_init()
1368 if (amdgpu_discovery_validate_ip(adev, inst, hw_id)) in amdgpu_discovery_reg_base_init()
1387 if (adev->vcn.num_vcn_inst < in amdgpu_discovery_reg_base_init()
1389 adev->vcn.inst[adev->vcn.num_vcn_inst].vcn_config = in amdgpu_discovery_reg_base_init()
1391 adev->vcn.num_vcn_inst++; in amdgpu_discovery_reg_base_init()
1392 adev->vcn.inst_mask |= in amdgpu_discovery_reg_base_init()
1394 adev->jpeg.inst_mask |= in amdgpu_discovery_reg_base_init()
1397 dev_err(adev->dev, "Too many VCN instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1398 adev->vcn.num_vcn_inst + 1, in amdgpu_discovery_reg_base_init()
1407 if (adev->sdma.num_instances < in amdgpu_discovery_reg_base_init()
1409 adev->sdma.num_instances++; in amdgpu_discovery_reg_base_init()
1410 adev->sdma.sdma_mask |= in amdgpu_discovery_reg_base_init()
1413 dev_err(adev->dev, "Too many SDMA instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1414 adev->sdma.num_instances + 1, in amdgpu_discovery_reg_base_init()
1420 if (adev->vpe.num_instances < AMDGPU_MAX_VPE_INSTANCES) in amdgpu_discovery_reg_base_init()
1421 adev->vpe.num_instances++; in amdgpu_discovery_reg_base_init()
1423 dev_err(adev->dev, "Too many VPE instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1424 adev->vpe.num_instances + 1, in amdgpu_discovery_reg_base_init()
1429 adev->gmc.num_umc++; in amdgpu_discovery_reg_base_init()
1430 adev->umc.node_inst_num++; in amdgpu_discovery_reg_base_init()
1434 adev->gfx.xcc_mask |= in amdgpu_discovery_reg_base_init()
1468 adev->reg_offset[hw_ip][ip->instance_number] = in amdgpu_discovery_reg_base_init()
1488 adev->ip_versions[hw_ip] in amdgpu_discovery_reg_base_init()
1506 if (wafl_ver && !adev->ip_versions[XGMI_HWIP][0]) in amdgpu_discovery_reg_base_init()
1507 adev->ip_versions[XGMI_HWIP][0] = wafl_ver; in amdgpu_discovery_reg_base_init()
1512 static void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) in amdgpu_discovery_harvest_ip() argument
1520 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_harvest_ip()
1522 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_harvest_ip()
1530 if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(10, 2, 0) && in amdgpu_discovery_harvest_ip()
1532 if ((adev->pdev->device == 0x731E && in amdgpu_discovery_harvest_ip()
1533 (adev->pdev->revision == 0xC6 || in amdgpu_discovery_harvest_ip()
1534 adev->pdev->revision == 0xC7)) || in amdgpu_discovery_harvest_ip()
1535 (adev->pdev->device == 0x7340 && in amdgpu_discovery_harvest_ip()
1536 adev->pdev->revision == 0xC9) || in amdgpu_discovery_harvest_ip()
1537 (adev->pdev->device == 0x7360 && in amdgpu_discovery_harvest_ip()
1538 adev->pdev->revision == 0xC7)) in amdgpu_discovery_harvest_ip()
1539 amdgpu_discovery_read_harvest_bit_per_ip(adev, in amdgpu_discovery_harvest_ip()
1542 amdgpu_discovery_read_from_harvest_table(adev, in amdgpu_discovery_harvest_ip()
1547 amdgpu_discovery_harvest_config_quirk(adev); in amdgpu_discovery_harvest_ip()
1549 if (vcn_harvest_count == adev->vcn.num_vcn_inst) { in amdgpu_discovery_harvest_ip()
1550 adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK; in amdgpu_discovery_harvest_ip()
1551 adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK; in amdgpu_discovery_harvest_ip()
1554 if (umc_harvest_count < adev->gmc.num_umc) { in amdgpu_discovery_harvest_ip()
1555 adev->gmc.num_umc -= umc_harvest_count; in amdgpu_discovery_harvest_ip()
1568 static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) in amdgpu_discovery_get_gfx_info() argument
1574 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_gfx_info()
1579 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_gfx_info()
1585 gc_info = (union gc_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_gfx_info()
1589 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v1.gc_num_se); in amdgpu_discovery_get_gfx_info()
1590 adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->v1.gc_num_wgp0_per_sa) + in amdgpu_discovery_get_gfx_info()
1592 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); in amdgpu_discovery_get_gfx_info()
1593 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1594 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v1.gc_num_gl2c); in amdgpu_discovery_get_gfx_info()
1595 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v1.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1596 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v1.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
1597 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v1.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
1598 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v1.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
1599 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v1.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
1600 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v1.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1601 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v1.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1602 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v1.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1603 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v1.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1604 adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->v1.gc_num_sc_per_se) / in amdgpu_discovery_get_gfx_info()
1606 adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->v1.gc_num_packer_per_sc); in amdgpu_discovery_get_gfx_info()
1608 adev->gfx.config.gc_num_tcp_per_sa = le32_to_cpu(gc_info->v1_1.gc_num_tcp_per_sa); in amdgpu_discovery_get_gfx_info()
1609 adev->gfx.config.gc_num_sdp_interface = le32_to_cpu(gc_info->v1_1.gc_num_sdp_interface); in amdgpu_discovery_get_gfx_info()
1610 adev->gfx.config.gc_num_tcps = le32_to_cpu(gc_info->v1_1.gc_num_tcps); in amdgpu_discovery_get_gfx_info()
1613 adev->gfx.config.gc_num_tcp_per_wpg = le32_to_cpu(gc_info->v1_2.gc_num_tcp_per_wpg); in amdgpu_discovery_get_gfx_info()
1614 adev->gfx.config.gc_tcp_l1_size = le32_to_cpu(gc_info->v1_2.gc_tcp_l1_size); in amdgpu_discovery_get_gfx_info()
1615 adev->gfx.config.gc_num_sqc_per_wgp = le32_to_cpu(gc_info->v1_2.gc_num_sqc_per_wgp); in amdgpu_discovery_get_gfx_info()
1616 …adev->gfx.config.gc_l1_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_2.gc_l1_instructio… in amdgpu_discovery_get_gfx_info()
1617 …adev->gfx.config.gc_l1_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_2.gc_l1_data_cache_size_p… in amdgpu_discovery_get_gfx_info()
1618 adev->gfx.config.gc_gl1c_per_sa = le32_to_cpu(gc_info->v1_2.gc_gl1c_per_sa); in amdgpu_discovery_get_gfx_info()
1619 … adev->gfx.config.gc_gl1c_size_per_instance = le32_to_cpu(gc_info->v1_2.gc_gl1c_size_per_instance); in amdgpu_discovery_get_gfx_info()
1620 adev->gfx.config.gc_gl2c_per_gpu = le32_to_cpu(gc_info->v1_2.gc_gl2c_per_gpu); in amdgpu_discovery_get_gfx_info()
1623 adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v1_3.gc_tcp_size_per_cu); in amdgpu_discovery_get_gfx_info()
1624 adev->gfx.config.gc_tcp_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcp_cache_line_size); in amdgpu_discovery_get_gfx_info()
1625 …adev->gfx.config.gc_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_instruction_cach… in amdgpu_discovery_get_gfx_info()
1626 …adev->gfx.config.gc_instruction_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_instruction_cache_l… in amdgpu_discovery_get_gfx_info()
1627 …adev->gfx.config.gc_scalar_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cach… in amdgpu_discovery_get_gfx_info()
1628 …adev->gfx.config.gc_scalar_data_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cache_l… in amdgpu_discovery_get_gfx_info()
1629 adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v1_3.gc_tcc_size); in amdgpu_discovery_get_gfx_info()
1630 adev->gfx.config.gc_tcc_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcc_cache_line_size); in amdgpu_discovery_get_gfx_info()
1634 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se); in amdgpu_discovery_get_gfx_info()
1635 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gc_info->v2.gc_num_cu_per_sh); in amdgpu_discovery_get_gfx_info()
1636 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v2.gc_num_sh_per_se); in amdgpu_discovery_get_gfx_info()
1637 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v2.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1638 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v2.gc_num_tccs); in amdgpu_discovery_get_gfx_info()
1639 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v2.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1640 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v2.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
1641 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v2.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
1642 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v2.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
1643 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v2.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
1644 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v2.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1645 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v2.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1646 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v2.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1647 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v2.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1648 adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->v2.gc_num_sc_per_se) / in amdgpu_discovery_get_gfx_info()
1650 adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->v2.gc_num_packer_per_sc); in amdgpu_discovery_get_gfx_info()
1652 adev->gfx.config.gc_num_tcp_per_sa = le32_to_cpu(gc_info->v2_1.gc_num_tcp_per_sh); in amdgpu_discovery_get_gfx_info()
1653 adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v2_1.gc_tcp_size_per_cu); in amdgpu_discovery_get_gfx_info()
1654 …adev->gfx.config.gc_num_sdp_interface = le32_to_cpu(gc_info->v2_1.gc_num_sdp_interface); /* per XC… in amdgpu_discovery_get_gfx_info()
1655 adev->gfx.config.gc_num_cu_per_sqc = le32_to_cpu(gc_info->v2_1.gc_num_cu_per_sqc); in amdgpu_discovery_get_gfx_info()
1656 …adev->gfx.config.gc_l1_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v2_1.gc_instruction_c… in amdgpu_discovery_get_gfx_info()
1657 …adev->gfx.config.gc_l1_data_cache_size_per_sqc = le32_to_cpu(gc_info->v2_1.gc_scalar_data_cache_si… in amdgpu_discovery_get_gfx_info()
1658 adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v2_1.gc_tcc_size); /* per XCD */ in amdgpu_discovery_get_gfx_info()
1662 dev_err(adev->dev, in amdgpu_discovery_get_gfx_info()
1676 static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) in amdgpu_discovery_get_mall_info() argument
1684 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_mall_info()
1689 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_mall_info()
1695 mall_info = (union mall_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_mall_info()
1703 for (u = 0; u < adev->gmc.num_umc; u++) { in amdgpu_discovery_get_mall_info()
1711 adev->gmc.mall_size = mall_size; in amdgpu_discovery_get_mall_info()
1712 adev->gmc.m_half_use = half_use; in amdgpu_discovery_get_mall_info()
1716 adev->gmc.mall_size = (uint64_t)mall_size_per_umc * adev->gmc.num_umc; in amdgpu_discovery_get_mall_info()
1719 dev_err(adev->dev, in amdgpu_discovery_get_mall_info()
1732 static int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev) in amdgpu_discovery_get_vcn_info() argument
1739 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_vcn_info()
1749 if (adev->vcn.num_vcn_inst > VCN_INFO_TABLE_MAX_NUM_INSTANCES) { in amdgpu_discovery_get_vcn_info()
1750 dev_err(adev->dev, "invalid vcn instances\n"); in amdgpu_discovery_get_vcn_info()
1754 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_vcn_info()
1760 vcn_info = (union vcn_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_vcn_info()
1767 for (v = 0; v < adev->vcn.num_vcn_inst; v++) { in amdgpu_discovery_get_vcn_info()
1768 adev->vcn.inst[v].vcn_codec_disable_mask = in amdgpu_discovery_get_vcn_info()
1773 dev_err(adev->dev, in amdgpu_discovery_get_vcn_info()
1786 static int amdgpu_discovery_refresh_nps_info(struct amdgpu_device *adev, in amdgpu_discovery_refresh_nps_info() argument
1796 amdgpu_device_vram_access(adev, pos, &bhdr, sizeof(bhdr), false); in amdgpu_discovery_refresh_nps_info()
1801 amdgpu_device_vram_access(adev, (pos + offset), nps_data, in amdgpu_discovery_refresh_nps_info()
1808 dev_err(adev->dev, "nps data refresh, checksum mismatch\n"); in amdgpu_discovery_refresh_nps_info()
1815 int amdgpu_discovery_get_nps_info(struct amdgpu_device *adev, in amdgpu_discovery_get_nps_info() argument
1831 r = amdgpu_discovery_refresh_nps_info(adev, &nps_data); in amdgpu_discovery_get_nps_info()
1836 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_nps_info()
1837 dev_err(adev->dev, in amdgpu_discovery_get_nps_info()
1842 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_nps_info()
1849 if (amdgpu_discovery_verify_npsinfo(adev, bhdr)) in amdgpu_discovery_get_nps_info()
1853 (union nps_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_nps_info()
1876 dev_err(adev->dev, "Unhandled NPS info table %d.%d\n", in amdgpu_discovery_get_nps_info()
1885 static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_common_ip_blocks() argument
1888 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_common_ip_blocks()
1900 amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1915 amdgpu_device_ip_block_add(adev, &nv_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1926 amdgpu_device_ip_block_add(adev, &soc21_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1930 amdgpu_device_ip_block_add(adev, &soc24_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1933 dev_err(adev->dev, in amdgpu_discovery_set_common_ip_blocks()
1935 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_common_ip_blocks()
1941 static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_gmc_ip_blocks() argument
1944 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_gmc_ip_blocks()
1956 amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1971 amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1982 amdgpu_device_ip_block_add(adev, &gmc_v11_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1986 amdgpu_device_ip_block_add(adev, &gmc_v12_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1989 dev_err(adev->dev, "Failed to add gmc ip block(GC_HWIP:0x%x)\n", in amdgpu_discovery_set_gmc_ip_blocks()
1990 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_gmc_ip_blocks()
1996 static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_ih_ip_blocks() argument
1998 switch (amdgpu_ip_version(adev, OSSSYS_HWIP, 0)) { in amdgpu_discovery_set_ih_ip_blocks()
2004 amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2011 amdgpu_device_ip_block_add(adev, &vega20_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2019 amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2024 amdgpu_device_ip_block_add(adev, &ih_v6_0_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2027 amdgpu_device_ip_block_add(adev, &ih_v6_1_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2030 amdgpu_device_ip_block_add(adev, &ih_v7_0_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2033 dev_err(adev->dev, in amdgpu_discovery_set_ih_ip_blocks()
2035 amdgpu_ip_version(adev, OSSSYS_HWIP, 0)); in amdgpu_discovery_set_ih_ip_blocks()
2041 static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_psp_ip_blocks() argument
2043 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_discovery_set_psp_ip_blocks()
2045 amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2049 amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2062 amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2065 amdgpu_device_ip_block_add(adev, &psp_v11_0_8_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2069 amdgpu_device_ip_block_add(adev, &psp_v12_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2086 amdgpu_device_ip_block_add(adev, &psp_v13_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2089 amdgpu_device_ip_block_add(adev, &psp_v13_0_4_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2094 amdgpu_device_ip_block_add(adev, &psp_v14_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2097 dev_err(adev->dev, in amdgpu_discovery_set_psp_ip_blocks()
2099 amdgpu_ip_version(adev, MP0_HWIP, 0)); in amdgpu_discovery_set_psp_ip_blocks()
2105 static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_smu_ip_blocks() argument
2107 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in amdgpu_discovery_set_smu_ip_blocks()
2112 if (adev->asic_type == CHIP_ARCTURUS) in amdgpu_discovery_set_smu_ip_blocks()
2113 amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2115 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2127 amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2131 amdgpu_device_ip_block_add(adev, &smu_v12_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2146 amdgpu_device_ip_block_add(adev, &smu_v13_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2154 amdgpu_device_ip_block_add(adev, &smu_v14_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2157 dev_err(adev->dev, in amdgpu_discovery_set_smu_ip_blocks()
2159 amdgpu_ip_version(adev, MP1_HWIP, 0)); in amdgpu_discovery_set_smu_ip_blocks()
2166 static void amdgpu_discovery_set_sriov_display(struct amdgpu_device *adev) in amdgpu_discovery_set_sriov_display() argument
2168 amdgpu_device_set_sriov_virtual_display(adev); in amdgpu_discovery_set_sriov_display()
2169 amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block); in amdgpu_discovery_set_sriov_display()
2173 static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_display_ip_blocks() argument
2175 if (adev->enable_virtual_display) { in amdgpu_discovery_set_display_ip_blocks()
2176 amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block); in amdgpu_discovery_set_display_ip_blocks()
2180 if (!amdgpu_device_has_dc_support(adev)) in amdgpu_discovery_set_display_ip_blocks()
2184 if (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in amdgpu_discovery_set_display_ip_blocks()
2185 switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in amdgpu_discovery_set_display_ip_blocks()
2208 if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, 0)) in amdgpu_discovery_set_display_ip_blocks()
2209 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_display_ip_blocks()
2211 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_display_ip_blocks()
2212 amdgpu_discovery_set_sriov_display(adev); in amdgpu_discovery_set_display_ip_blocks()
2214 amdgpu_device_ip_block_add(adev, &dm_ip_block); in amdgpu_discovery_set_display_ip_blocks()
2217 dev_err(adev->dev, in amdgpu_discovery_set_display_ip_blocks()
2219 amdgpu_ip_version(adev, DCE_HWIP, 0)); in amdgpu_discovery_set_display_ip_blocks()
2222 } else if (amdgpu_ip_version(adev, DCI_HWIP, 0)) { in amdgpu_discovery_set_display_ip_blocks()
2223 switch (amdgpu_ip_version(adev, DCI_HWIP, 0)) { in amdgpu_discovery_set_display_ip_blocks()
2227 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_display_ip_blocks()
2228 amdgpu_discovery_set_sriov_display(adev); in amdgpu_discovery_set_display_ip_blocks()
2230 amdgpu_device_ip_block_add(adev, &dm_ip_block); in amdgpu_discovery_set_display_ip_blocks()
2233 dev_err(adev->dev, in amdgpu_discovery_set_display_ip_blocks()
2235 amdgpu_ip_version(adev, DCI_HWIP, 0)); in amdgpu_discovery_set_display_ip_blocks()
2243 static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_gc_ip_blocks() argument
2245 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_gc_ip_blocks()
2254 amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2259 amdgpu_device_ip_block_add(adev, &gfx_v9_4_3_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2274 amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2285 amdgpu_device_ip_block_add(adev, &gfx_v11_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2289 amdgpu_device_ip_block_add(adev, &gfx_v12_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2292 dev_err(adev->dev, "Failed to add gfx ip block(GC_HWIP:0x%x)\n", in amdgpu_discovery_set_gc_ip_blocks()
2293 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_gc_ip_blocks()
2299 static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_sdma_ip_blocks() argument
2301 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in amdgpu_discovery_set_sdma_ip_blocks()
2310 amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2315 amdgpu_device_ip_block_add(adev, &sdma_v4_4_2_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2321 amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2331 amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2341 amdgpu_device_ip_block_add(adev, &sdma_v6_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2345 amdgpu_device_ip_block_add(adev, &sdma_v7_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2348 dev_err(adev->dev, in amdgpu_discovery_set_sdma_ip_blocks()
2350 amdgpu_ip_version(adev, SDMA0_HWIP, 0)); in amdgpu_discovery_set_sdma_ip_blocks()
2356 static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_mm_ip_blocks() argument
2358 if (amdgpu_ip_version(adev, VCE_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks()
2359 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks()
2363 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) in amdgpu_discovery_set_mm_ip_blocks()
2364 amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2367 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2369 amdgpu_ip_version(adev, UVD_HWIP, 0)); in amdgpu_discovery_set_mm_ip_blocks()
2372 switch (amdgpu_ip_version(adev, VCE_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks()
2376 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) in amdgpu_discovery_set_mm_ip_blocks()
2377 amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2380 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2382 amdgpu_ip_version(adev, VCE_HWIP, 0)); in amdgpu_discovery_set_mm_ip_blocks()
2386 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks()
2389 amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2394 amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2395 if (!amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_mm_ip_blocks()
2396 amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2401 amdgpu_device_ip_block_add(adev, &vcn_v2_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2402 amdgpu_device_ip_block_add(adev, &jpeg_v2_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2405 amdgpu_device_ip_block_add(adev, &vcn_v2_6_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2406 amdgpu_device_ip_block_add(adev, &jpeg_v2_6_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2413 amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2414 if (!amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_mm_ip_blocks()
2415 amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2418 amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2423 amdgpu_device_ip_block_add(adev, &vcn_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2424 amdgpu_device_ip_block_add(adev, &jpeg_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2427 amdgpu_device_ip_block_add(adev, &vcn_v4_0_3_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2428 amdgpu_device_ip_block_add(adev, &jpeg_v4_0_3_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2432 amdgpu_device_ip_block_add(adev, &vcn_v4_0_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2433 amdgpu_device_ip_block_add(adev, &jpeg_v4_0_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2436 amdgpu_device_ip_block_add(adev, &vcn_v5_0_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2437 amdgpu_device_ip_block_add(adev, &jpeg_v5_0_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2440 amdgpu_device_ip_block_add(adev, &vcn_v5_0_1_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2441 amdgpu_device_ip_block_add(adev, &jpeg_v5_0_1_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2444 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2446 amdgpu_ip_version(adev, UVD_HWIP, 0)); in amdgpu_discovery_set_mm_ip_blocks()
2453 static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_mes_ip_blocks() argument
2455 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_mes_ip_blocks()
2465 amdgpu_device_ip_block_add(adev, &mes_v11_0_ip_block); in amdgpu_discovery_set_mes_ip_blocks()
2466 adev->enable_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2467 adev->enable_mes_kiq = true; in amdgpu_discovery_set_mes_ip_blocks()
2471 amdgpu_device_ip_block_add(adev, &mes_v12_0_ip_block); in amdgpu_discovery_set_mes_ip_blocks()
2472 adev->enable_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2473 adev->enable_mes_kiq = true; in amdgpu_discovery_set_mes_ip_blocks()
2475 adev->enable_uni_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2483 static void amdgpu_discovery_init_soc_config(struct amdgpu_device *adev) in amdgpu_discovery_init_soc_config() argument
2485 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_init_soc_config()
2489 aqua_vanjaram_init_soc_config(adev); in amdgpu_discovery_init_soc_config()
2496 static int amdgpu_discovery_set_vpe_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_vpe_ip_blocks() argument
2498 switch (amdgpu_ip_version(adev, VPE_HWIP, 0)) { in amdgpu_discovery_set_vpe_ip_blocks()
2502 amdgpu_device_ip_block_add(adev, &vpe_v6_1_ip_block); in amdgpu_discovery_set_vpe_ip_blocks()
2511 static int amdgpu_discovery_set_umsch_mm_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_umsch_mm_ip_blocks() argument
2513 switch (amdgpu_ip_version(adev, VCN_HWIP, 0)) { in amdgpu_discovery_set_umsch_mm_ip_blocks()
2517 amdgpu_device_ip_block_add(adev, &umsch_mm_v4_0_ip_block); in amdgpu_discovery_set_umsch_mm_ip_blocks()
2518 adev->enable_umsch_mm = true; in amdgpu_discovery_set_umsch_mm_ip_blocks()
2528 static int amdgpu_discovery_set_isp_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_isp_ip_blocks() argument
2531 switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) { in amdgpu_discovery_set_isp_ip_blocks()
2533 amdgpu_device_ip_block_add(adev, &isp_v4_1_0_ip_block); in amdgpu_discovery_set_isp_ip_blocks()
2536 amdgpu_device_ip_block_add(adev, &isp_v4_1_1_ip_block); in amdgpu_discovery_set_isp_ip_blocks()
2546 int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_ip_blocks() argument
2550 switch (adev->asic_type) { in amdgpu_discovery_set_ip_blocks()
2562 r = amdgpu_discovery_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2564 amdgpu_discovery_harvest_ip(adev); in amdgpu_discovery_set_ip_blocks()
2565 amdgpu_discovery_get_gfx_info(adev); in amdgpu_discovery_set_ip_blocks()
2566 amdgpu_discovery_get_mall_info(adev); in amdgpu_discovery_set_ip_blocks()
2567 amdgpu_discovery_get_vcn_info(adev); in amdgpu_discovery_set_ip_blocks()
2571 r = amdgpu_discovery_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2575 amdgpu_discovery_harvest_ip(adev); in amdgpu_discovery_set_ip_blocks()
2576 amdgpu_discovery_get_gfx_info(adev); in amdgpu_discovery_set_ip_blocks()
2577 amdgpu_discovery_get_mall_info(adev); in amdgpu_discovery_set_ip_blocks()
2578 amdgpu_discovery_get_vcn_info(adev); in amdgpu_discovery_set_ip_blocks()
2582 switch (adev->asic_type) { in amdgpu_discovery_set_ip_blocks()
2584 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2585 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2586 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2587 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2588 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2589 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2590 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2591 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2592 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2593 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 0); in amdgpu_discovery_set_ip_blocks()
2594 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2595 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 0, 0); in amdgpu_discovery_set_ip_blocks()
2596 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2597 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2598 adev->ip_versions[THM_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2599 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2600 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 0, 1); in amdgpu_discovery_set_ip_blocks()
2601 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2602 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2603 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 0); in amdgpu_discovery_set_ip_blocks()
2606 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2607 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2608 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2609 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
2610 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
2611 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2612 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2613 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2614 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2615 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2616 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(6, 2, 0); in amdgpu_discovery_set_ip_blocks()
2617 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2618 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2619 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2620 adev->ip_versions[THM_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2621 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 1); in amdgpu_discovery_set_ip_blocks()
2622 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 2, 1); in amdgpu_discovery_set_ip_blocks()
2623 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2624 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2625 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 1); in amdgpu_discovery_set_ip_blocks()
2628 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2629 adev->sdma.num_instances = 1; in amdgpu_discovery_set_ip_blocks()
2630 adev->vcn.num_vcn_inst = 1; in amdgpu_discovery_set_ip_blocks()
2631 adev->gmc.num_umc = 2; in amdgpu_discovery_set_ip_blocks()
2632 if (adev->apu_flags & AMD_APU_IS_RAVEN2) { in amdgpu_discovery_set_ip_blocks()
2633 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2634 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2635 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2636 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2637 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2638 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 1); in amdgpu_discovery_set_ip_blocks()
2639 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 0, 1); in amdgpu_discovery_set_ip_blocks()
2640 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 5, 0); in amdgpu_discovery_set_ip_blocks()
2641 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2642 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2643 adev->ip_versions[THM_HWIP][0] = IP_VERSION(10, 1, 0); in amdgpu_discovery_set_ip_blocks()
2644 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2645 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 2, 2); in amdgpu_discovery_set_ip_blocks()
2646 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2647 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2648 adev->ip_versions[ISP_HWIP][0] = IP_VERSION(2, 0, 0); in amdgpu_discovery_set_ip_blocks()
2650 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2651 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2652 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2653 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2654 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2655 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 0); in amdgpu_discovery_set_ip_blocks()
2656 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2657 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2658 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2659 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2660 adev->ip_versions[THM_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2661 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2662 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2663 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
2664 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
2665 adev->ip_versions[ISP_HWIP][0] = IP_VERSION(2, 0, 0); in amdgpu_discovery_set_ip_blocks()
2669 vega20_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2670 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2671 adev->gmc.num_umc = 8; in amdgpu_discovery_set_ip_blocks()
2672 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2673 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2674 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2675 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2676 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2677 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2678 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 0); in amdgpu_discovery_set_ip_blocks()
2679 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 0); in amdgpu_discovery_set_ip_blocks()
2680 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 1); in amdgpu_discovery_set_ip_blocks()
2681 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2682 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2683 adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2684 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2685 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2686 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks()
2687 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks()
2688 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2689 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 1, 0); in amdgpu_discovery_set_ip_blocks()
2692 arct_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2693 adev->sdma.num_instances = 8; in amdgpu_discovery_set_ip_blocks()
2694 adev->vcn.num_vcn_inst = 2; in amdgpu_discovery_set_ip_blocks()
2695 adev->gmc.num_umc = 8; in amdgpu_discovery_set_ip_blocks()
2696 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2697 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2698 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2699 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2700 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2701 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2702 adev->ip_versions[SDMA1_HWIP][1] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2703 adev->ip_versions[SDMA1_HWIP][2] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2704 adev->ip_versions[SDMA1_HWIP][3] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2705 adev->ip_versions[SDMA1_HWIP][4] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2706 adev->ip_versions[SDMA1_HWIP][5] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2707 adev->ip_versions[SDMA1_HWIP][6] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2708 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 1); in amdgpu_discovery_set_ip_blocks()
2709 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 1); in amdgpu_discovery_set_ip_blocks()
2710 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 2); in amdgpu_discovery_set_ip_blocks()
2711 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 4); in amdgpu_discovery_set_ip_blocks()
2712 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2713 adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 3); in amdgpu_discovery_set_ip_blocks()
2714 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 3); in amdgpu_discovery_set_ip_blocks()
2715 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2716 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2717 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2720 aldebaran_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2721 adev->sdma.num_instances = 5; in amdgpu_discovery_set_ip_blocks()
2722 adev->vcn.num_vcn_inst = 2; in amdgpu_discovery_set_ip_blocks()
2723 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2724 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2725 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2726 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2727 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2728 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2729 adev->ip_versions[SDMA0_HWIP][1] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2730 adev->ip_versions[SDMA0_HWIP][2] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2731 adev->ip_versions[SDMA0_HWIP][3] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2732 adev->ip_versions[SDMA0_HWIP][4] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2733 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 2); in amdgpu_discovery_set_ip_blocks()
2734 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 4); in amdgpu_discovery_set_ip_blocks()
2735 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 7, 0); in amdgpu_discovery_set_ip_blocks()
2736 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2737 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2738 adev->ip_versions[THM_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2739 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2740 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2741 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 6, 0); in amdgpu_discovery_set_ip_blocks()
2742 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 6, 0); in amdgpu_discovery_set_ip_blocks()
2743 adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2749 amdgpu_discovery_init_soc_config(adev); in amdgpu_discovery_set_ip_blocks()
2750 amdgpu_discovery_sysfs_init(adev); in amdgpu_discovery_set_ip_blocks()
2752 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2761 adev->family = AMDGPU_FAMILY_AI; in amdgpu_discovery_set_ip_blocks()
2766 adev->family = AMDGPU_FAMILY_RV; in amdgpu_discovery_set_ip_blocks()
2777 adev->family = AMDGPU_FAMILY_NV; in amdgpu_discovery_set_ip_blocks()
2780 adev->family = AMDGPU_FAMILY_VGH; in amdgpu_discovery_set_ip_blocks()
2781 adev->apu_flags |= AMD_APU_IS_VANGOGH; in amdgpu_discovery_set_ip_blocks()
2784 adev->family = AMDGPU_FAMILY_YC; in amdgpu_discovery_set_ip_blocks()
2787 adev->family = AMDGPU_FAMILY_GC_10_3_6; in amdgpu_discovery_set_ip_blocks()
2790 adev->family = AMDGPU_FAMILY_GC_10_3_7; in amdgpu_discovery_set_ip_blocks()
2795 adev->family = AMDGPU_FAMILY_GC_11_0_0; in amdgpu_discovery_set_ip_blocks()
2799 adev->family = AMDGPU_FAMILY_GC_11_0_1; in amdgpu_discovery_set_ip_blocks()
2805 adev->family = AMDGPU_FAMILY_GC_11_5_0; in amdgpu_discovery_set_ip_blocks()
2809 adev->family = AMDGPU_FAMILY_GC_12_0_0; in amdgpu_discovery_set_ip_blocks()
2815 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2831 adev->flags |= AMD_IS_APU; in amdgpu_discovery_set_ip_blocks()
2838 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2841 adev->nbio.funcs = &nbio_v6_1_funcs; in amdgpu_discovery_set_ip_blocks()
2842 adev->nbio.hdp_flush_reg = &nbio_v6_1_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2847 adev->nbio.funcs = &nbio_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
2848 adev->nbio.hdp_flush_reg = &nbio_v7_0_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2853 adev->nbio.funcs = &nbio_v7_4_funcs; in amdgpu_discovery_set_ip_blocks()
2854 adev->nbio.hdp_flush_reg = &nbio_v7_4_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2858 adev->nbio.funcs = &nbio_v7_9_funcs; in amdgpu_discovery_set_ip_blocks()
2859 adev->nbio.hdp_flush_reg = &nbio_v7_9_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2865 adev->nbio.funcs = &nbio_v7_11_funcs; in amdgpu_discovery_set_ip_blocks()
2866 adev->nbio.hdp_flush_reg = &nbio_v7_11_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2873 adev->nbio.funcs = &nbio_v7_2_funcs; in amdgpu_discovery_set_ip_blocks()
2874 adev->nbio.hdp_flush_reg = &nbio_v7_2_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2884 adev->nbio.funcs = &nbio_v2_3_funcs; in amdgpu_discovery_set_ip_blocks()
2885 adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2889 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_ip_blocks()
2890 adev->nbio.funcs = &nbio_v4_3_sriov_funcs; in amdgpu_discovery_set_ip_blocks()
2892 adev->nbio.funcs = &nbio_v4_3_funcs; in amdgpu_discovery_set_ip_blocks()
2893 adev->nbio.hdp_flush_reg = &nbio_v4_3_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2897 adev->nbio.funcs = &nbio_v7_7_funcs; in amdgpu_discovery_set_ip_blocks()
2898 adev->nbio.hdp_flush_reg = &nbio_v7_7_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2901 adev->nbio.funcs = &nbif_v6_3_1_funcs; in amdgpu_discovery_set_ip_blocks()
2902 adev->nbio.hdp_flush_reg = &nbif_v6_3_1_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2908 switch (amdgpu_ip_version(adev, HDP_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2919 adev->hdp.funcs = &hdp_v4_0_funcs; in amdgpu_discovery_set_ip_blocks()
2927 adev->hdp.funcs = &hdp_v5_0_funcs; in amdgpu_discovery_set_ip_blocks()
2930 adev->hdp.funcs = &hdp_v5_2_funcs; in amdgpu_discovery_set_ip_blocks()
2935 adev->hdp.funcs = &hdp_v6_0_funcs; in amdgpu_discovery_set_ip_blocks()
2938 adev->hdp.funcs = &hdp_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
2944 switch (amdgpu_ip_version(adev, DF_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2948 adev->df.funcs = &df_v3_6_funcs; in amdgpu_discovery_set_ip_blocks()
2955 adev->df.funcs = &df_v1_7_funcs; in amdgpu_discovery_set_ip_blocks()
2958 adev->df.funcs = &df_v4_3_funcs; in amdgpu_discovery_set_ip_blocks()
2961 adev->df.funcs = &df_v4_6_2_funcs; in amdgpu_discovery_set_ip_blocks()
2965 adev->df.funcs = &df_v4_15_funcs; in amdgpu_discovery_set_ip_blocks()
2971 switch (amdgpu_ip_version(adev, SMUIO_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2977 adev->smuio.funcs = &smuio_v9_0_funcs; in amdgpu_discovery_set_ip_blocks()
2985 adev->smuio.funcs = &smuio_v11_0_funcs; in amdgpu_discovery_set_ip_blocks()
2995 adev->smuio.funcs = &smuio_v11_0_6_funcs; in amdgpu_discovery_set_ip_blocks()
2998 adev->smuio.funcs = &smuio_v13_0_funcs; in amdgpu_discovery_set_ip_blocks()
3002 adev->smuio.funcs = &smuio_v13_0_3_funcs; in amdgpu_discovery_set_ip_blocks()
3003 if (adev->smuio.funcs->get_pkg_type(adev) == AMDGPU_PKG_TYPE_APU) { in amdgpu_discovery_set_ip_blocks()
3004 adev->flags |= AMD_IS_APU; in amdgpu_discovery_set_ip_blocks()
3011 adev->smuio.funcs = &smuio_v13_0_6_funcs; in amdgpu_discovery_set_ip_blocks()
3014 adev->smuio.funcs = &smuio_v14_0_2_funcs; in amdgpu_discovery_set_ip_blocks()
3020 switch (amdgpu_ip_version(adev, LSDMA_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
3025 adev->lsdma.funcs = &lsdma_v6_0_funcs; in amdgpu_discovery_set_ip_blocks()
3029 adev->lsdma.funcs = &lsdma_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
3035 r = amdgpu_discovery_set_common_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3039 r = amdgpu_discovery_set_gmc_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3044 if (amdgpu_sriov_vf(adev)) { in amdgpu_discovery_set_ip_blocks()
3045 r = amdgpu_discovery_set_psp_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3048 r = amdgpu_discovery_set_ih_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3052 r = amdgpu_discovery_set_ih_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3056 if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { in amdgpu_discovery_set_ip_blocks()
3057 r = amdgpu_discovery_set_psp_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3063 if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { in amdgpu_discovery_set_ip_blocks()
3064 r = amdgpu_discovery_set_smu_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3069 r = amdgpu_discovery_set_display_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3073 r = amdgpu_discovery_set_gc_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3077 r = amdgpu_discovery_set_sdma_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3081 if ((adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT && in amdgpu_discovery_set_ip_blocks()
3082 !amdgpu_sriov_vf(adev)) || in amdgpu_discovery_set_ip_blocks()
3083 (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO && amdgpu_dpm == 1)) { in amdgpu_discovery_set_ip_blocks()
3084 r = amdgpu_discovery_set_smu_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3089 r = amdgpu_discovery_set_mm_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3093 r = amdgpu_discovery_set_mes_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3097 r = amdgpu_discovery_set_vpe_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3101 r = amdgpu_discovery_set_umsch_mm_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3105 r = amdgpu_discovery_set_isp_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()