80 		 atomic_inc_return(&adev->cper.unique_id));  in amdgpu_cper_entry_fill_hdr()
288 	struct amdgpu_ring *ring = &adev->cper.ring_buf;  in amdgpu_cper_generate_ue_record()
320 	struct amdgpu_ring *ring = &adev->cper.ring_buf;  in amdgpu_cper_generate_bp_threshold_record()
362 	struct amdgpu_ring *ring = &adev->cper.ring_buf;  in amdgpu_cper_generate_ce_records()
475 	mutex_lock(&ring->adev->cper.ring_lock);  in amdgpu_cper_ring_write()
510 	mutex_unlock(&ring->adev->cper.ring_lock);  in amdgpu_cper_ring_write()
533 	struct amdgpu_ring *ring = &(adev->cper.ring_buf);  in amdgpu_cper_ring_init()
535 	mutex_init(&adev->cper.ring_lock);  in amdgpu_cper_ring_init()
561 	mutex_init(&adev->cper.cper_lock);  in amdgpu_cper_init()
563 	adev->cper.enabled = true;  in amdgpu_cper_init()
564 	adev->cper.max_count = CPER_MAX_ALLOWED_COUNT;  in amdgpu_cper_init()
574 	adev->cper.enabled = false;  in amdgpu_cper_fini()
576 	amdgpu_ring_fini(&(adev->cper.ring_buf));  in amdgpu_cper_fini()
577 	adev->cper.count = 0;  in amdgpu_cper_fini()
578 	adev->cper.wptr = 0;  in amdgpu_cper_fini()