Lines Matching refs:on
14 depends on HAS_IOMEM && EDAC_SUPPORT && RAS
38 This turns on debugging information for the entire EDAC subsystem.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
45 depends on CPU_SUP_AMD && X86_MCE_AMD
49 occurring on your machine in human-readable form.
57 depends on ACPI_APEI_GHES
90 The EDAC ECS feature is optional and is designed to control on-die
108 depends on AMD_NB && EDAC_DECODE_MCE
109 depends on AMD_NODE
112 Support for error detection and correction of DRAM ECC errors on
135 depends on (ARCH_ALPINE || COMPILE_TEST)
142 depends on PCI && X86_32
144 Support for error detection and correction on the AMD 76x
149 depends on PCI && X86_32
151 Support for error detection and correction on the Intel
156 depends on PCI && X86
158 Support for error detection and correction on the Intel
163 depends on PCI && X86_32
164 depends on BROKEN
166 Support for error detection and correction on the Intel
171 depends on PCI && X86_32
173 Support for error detection and correction on the Intel
178 depends on PCI && X86
180 Support for error detection and correction on the Intel
185 depends on PCI && X86
187 Support for error detection and correction on the Intel
192 depends on PCI && X86
194 Support for error detection and correction on the Intel
199 depends on PCI && X86 && X86_MCE_INTEL
201 Support for error detection and correction on the Intel
206 depends on PCI && X86
208 Support for error detection and correction on the Intel
213 depends on PCI && X86
220 depends on PCI && X86 && X86_MCE_INTEL
223 i7 Core (Nehalem) Integrated Memory Controller that exists on
229 depends on PCI && X86_32
231 Support for error detection and correction on the Intel
236 depends on PCI && X86_32
238 Support for error detection and correction on the Radisys
243 depends on X86 && PCI
244 depends on BROKEN
251 depends on X86 && PCI
258 depends on X86 && PCI
265 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG
272 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
273 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_SKX can't be y
284 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
285 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_I10NM can't be y
296 depends on PCI && X86_64 && X86_MCE_INTEL
299 Support for error detection and correction on the Intel
301 first used on the Apollo Lake platform and Denverton
302 micro-server but may appear on others in the future.
306 depends on PCI && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG
307 depends on X86_64 && X86_MCE_INTEL
309 Support for error detection and correction on the Intel
311 This In-Band ECC is first used on the Elkhart Lake SoC but
312 may appear on others in the future.
316 depends on FSL_SOC && EDAC=y
318 Support for error detection and correction on the Freescale
323 depends on ARCH_LAYERSCAPE || SOC_LS1021A
325 Support for error detection and correction on Freescale memory
326 controllers on Layerscape SoCs.
330 depends on PPC_PASEMI && PCI
332 Support for error detection and correction on PA Semi
337 depends on PPC64
339 Support for error detection and correction on the
346 depends on ARCH_HIGHBANK
348 Support for error detection and correction on the
353 depends on ARCH_HIGHBANK
355 Support for error detection and correction on the
360 depends on CPU_CAVIUM_OCTEON
362 Support for error detection and correction on the primary caches of
367 depends on CAVIUM_OCTEON_SOC
369 Support for error detection and correction on the
374 depends on CAVIUM_OCTEON_SOC
376 Support for error detection and correction on the
381 depends on PCI && CAVIUM_OCTEON_SOC
383 Support for error detection and correction on the
388 depends on ARM64
389 depends on PCI
391 Support for error detection and correction on the
398 depends on EDAC=y && ARCH_INTEL_SOCFPGA
400 Support for error detection and correction on the
406 depends on EDAC_ALTERA=y
408 Support for error detection and correction on the
415 depends on EDAC_ALTERA=y && CACHE_L2X0
417 Support for error detection and correction on the
423 depends on EDAC_ALTERA=y && SRAM && GENERIC_ALLOCATOR
425 Support for error detection and correction on the
430 depends on EDAC_ALTERA=y
432 Support for error detection and correction on the
437 depends on EDAC_ALTERA=y && MTD_NAND_DENALI
439 Support for error detection and correction on the
444 depends on EDAC_ALTERA=y && PL330_DMA=y
446 Support for error detection and correction on the
451 depends on EDAC_ALTERA=y && USB_DWC2
453 Support for error detection and correction on the
458 depends on EDAC_ALTERA=y && SPI_CADENCE_QUADSPI
460 Support for error detection and correction on the
465 depends on EDAC_ALTERA=y && MMC_DW
467 Support for error detection and correction on the
472 depends on EDAC=y && SIFIVE_CCACHE
474 Support for error detection and correction on the SiFive SoCs.
478 depends on MACH_MVEBU_V7
480 Support for error correction and detection on the Marvell Aramada XP
485 depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || ARCH_MXC
487 Support for error detection and correction on the Synopsys DDR
492 depends on (ARM64 || COMPILE_TEST)
494 Support for error detection and correction on the
499 depends on ARCH_KEYSTONE || SOC_DRA7XX
501 Support for error detection and correction on the TI SoCs.
505 depends on ARCH_QCOM && QCOM_LLCC
507 Support for error detection and correction on the
519 depends on ARCH_ASPEED
521 Support for error detection and correction on the Aspeed AST BMC SoC.
528 depends on ARM64 && ((MELLANOX_PLATFORM && ACPI) || COMPILE_TEST)
530 Support for error detection and correction on the
535 depends on ARM64
537 Support for error detection and correction on the
542 depends on ARCH_ZYNQMP || COMPILE_TEST
550 depends on (ARCH_NPCM || COMPILE_TEST)
552 Support for error detection and correction on the Nuvoton NPCM DDR
561 depends on ARCH_ZYNQMP || COMPILE_TEST
563 Support for error detection and correction on the Xilinx Versal DDR
572 depends on LOONGARCH && ACPI
574 Support for error detection and correction on the Loongson