323 	struct list_head node;  member
335 	struct list_head node;  member
347 	struct list_head node;  member
359 	struct list_head node;  member
375 	struct list_head node;  member
651 			       struct xilinx_axidma_tx_segment, node);  in xilinx_dma_get_metadata_ptr()
721 					   node);  in xilinx_axidma_alloc_tx_segment()
722 		list_del(&segment->node);  in xilinx_axidma_alloc_tx_segment()
748 					   node);  in xilinx_aximcdma_alloc_tx_segment()
749 		list_del(&segment->node);  in xilinx_aximcdma_alloc_tx_segment()
788 	list_add_tail(&segment->node, &chan->free_seg_list);  in xilinx_dma_free_tx_segment()
802 	list_add_tail(&segment->node, &chan->free_seg_list);  in xilinx_mcdma_free_tx_segment()
865 		list_for_each_entry_safe(segment, next, &desc->segments, node) {  in xilinx_dma_free_tx_descriptor()
866 			list_del(&segment->node);  in xilinx_dma_free_tx_descriptor()
871 					 &desc->segments, node) {  in xilinx_dma_free_tx_descriptor()
872 			list_del(&cdma_segment->node);  in xilinx_dma_free_tx_descriptor()
877 					 &desc->segments, node) {  in xilinx_dma_free_tx_descriptor()
878 			list_del(&axidma_segment->node);  in xilinx_dma_free_tx_descriptor()
883 					 &desc->segments, node) {  in xilinx_dma_free_tx_descriptor()
884 			list_del(&aximcdma_segment->node);  in xilinx_dma_free_tx_descriptor()
904 	list_for_each_entry_safe(desc, next, list, node) {  in xilinx_dma_free_desc_list()
905 		list_del(&desc->node);  in xilinx_dma_free_desc_list()
997 					      node);  in xilinx_dma_get_residue()
1005 						node);  in xilinx_dma_get_residue()
1013 					   node);  in xilinx_dma_get_residue()
1055 	list_for_each_entry_safe(desc, next, &chan->done_list, node) {  in xilinx_dma_chan_desc_cleanup()
1064 		list_del(&desc->node);  in xilinx_dma_chan_desc_cleanup()
1167 			list_add_tail(&chan->seg_v[i].node,  in xilinx_dma_alloc_chan_resources()
1191 			list_add_tail(&chan->seg_mv[i].node,  in xilinx_dma_alloc_chan_resources()
1287 				       struct xilinx_dma_tx_descriptor, node);  in xilinx_dma_tx_status()
1382 				struct xilinx_dma_tx_descriptor, node);  in xilinx_vdma_start_transfer()
1431 	list_for_each_entry(segment, &desc->segments, node) {  in xilinx_vdma_start_transfer()
1456 	list_move_tail(&desc->node, &chan->active_list);  in xilinx_vdma_start_transfer()
1483 				     struct xilinx_dma_tx_descriptor, node);  in xilinx_cdma_start_transfer()
1485 				    struct xilinx_dma_tx_descriptor, node);  in xilinx_cdma_start_transfer()
1487 				       struct xilinx_cdma_tx_segment, node);  in xilinx_cdma_start_transfer()
1516 					   node);  in xilinx_cdma_start_transfer()
1555 				     struct xilinx_dma_tx_descriptor, node);  in xilinx_dma_start_transfer()
1557 				    struct xilinx_dma_tx_descriptor, node);  in xilinx_dma_start_transfer()
1559 				       struct xilinx_axidma_tx_segment, node);  in xilinx_dma_start_transfer()
1596 					   node);  in xilinx_dma_start_transfer()
1637 				     struct xilinx_dma_tx_descriptor, node);  in xilinx_mcdma_start_transfer()
1639 				    struct xilinx_dma_tx_descriptor, node);  in xilinx_mcdma_start_transfer()
1641 				       struct xilinx_aximcdma_tx_segment, node);  in xilinx_mcdma_start_transfer()
1723 	list_for_each_entry_safe(desc, next, &chan->active_list, node) {  in xilinx_dma_complete_descriptor()
1728 					      struct xilinx_axidma_tx_segment, node);  in xilinx_dma_complete_descriptor()
1739 		list_del(&desc->node);  in xilinx_dma_complete_descriptor()
1742 		list_add_tail(&desc->node, &chan->done_list);  in xilinx_dma_complete_descriptor()
1948 				    struct xilinx_dma_tx_descriptor, node);  in append_desc_queue()
1952 					       node);  in append_desc_queue()
1957 						node);  in append_desc_queue()
1962 					       node);  in append_desc_queue()
1968 					node);  in append_desc_queue()
1977 	list_add_tail(&desc->node, &chan->pending_list);  in append_desc_queue()
2105 	list_add_tail(&segment->node, &desc->segments);  in xilinx_vdma_dma_prep_interleaved()
2109 				   struct xilinx_vdma_tx_segment, node);  in xilinx_vdma_dma_prep_interleaved()
2163 	list_add_tail(&segment->node, &desc->segments);  in xilinx_cdma_prep_memcpy()
2250 			list_add_tail(&segment->node, &desc->segments);  in xilinx_dma_prep_slave_sg()
2255 				   struct xilinx_axidma_tx_segment, node);  in xilinx_dma_prep_slave_sg()
2263 					  node);  in xilinx_dma_prep_slave_sg()
2353 			list_add_tail(&segment->node, &desc->segments);  in xilinx_dma_prep_dma_cyclic()
2358 				   struct xilinx_axidma_tx_segment, node);  in xilinx_dma_prep_dma_cyclic()
2368 				  node);  in xilinx_dma_prep_dma_cyclic()
2457 			list_add_tail(&segment->node, &desc->segments);  in xilinx_mcdma_prep_slave_sg()
2462 				   struct xilinx_aximcdma_tx_segment, node);  in xilinx_mcdma_prep_slave_sg()
2470 					  node);  in xilinx_mcdma_prep_slave_sg()
2813 				  struct device_node *node)  in xilinx_dma_chan_probe()  argument
2843 	has_dre = of_property_read_bool(node, "xlnx,include-dre");  in xilinx_dma_chan_probe()
2845 	of_property_read_u8(node, "xlnx,irq-delay", &chan->irq_delay);  in xilinx_dma_chan_probe()
2847 	chan->genlock = of_property_read_bool(node, "xlnx,genlock-mode");  in xilinx_dma_chan_probe()
2849 	err = of_property_read_u32(node, "xlnx,datawidth", &value);  in xilinx_dma_chan_probe()
2863 	if (of_device_is_compatible(node, "xlnx,axi-vdma-mm2s-channel") ||  in xilinx_dma_chan_probe()
2864 	    of_device_is_compatible(node, "xlnx,axi-dma-mm2s-channel") ||  in xilinx_dma_chan_probe()
2865 	    of_device_is_compatible(node, "xlnx,axi-cdma-channel")) {  in xilinx_dma_chan_probe()
2879 	} else if (of_device_is_compatible(node,  in xilinx_dma_chan_probe()
2881 		   of_device_is_compatible(node,  in xilinx_dma_chan_probe()
2886 		chan->has_vflip = of_property_read_bool(node,  in xilinx_dma_chan_probe()
2913 	chan->irq = of_irq_get(node, chan->tdest);  in xilinx_dma_chan_probe()
2980 				    struct device_node *node)  in xilinx_dma_child_probe()  argument
2985 	ret = of_property_read_u32(node, "dma-channels", &nr_channels);  in xilinx_dma_child_probe()
2990 		ret = xilinx_dma_chan_probe(xdev, node);  in xilinx_dma_child_probe()
3064 	struct device_node *node = pdev->dev.of_node;  in xilinx_dma_probe()  local
3103 		if (!of_property_read_u32(node, "xlnx,sg-length-width",  in xilinx_dma_probe()
3120 			of_property_read_bool(node, "xlnx,axistream-connected");  in xilinx_dma_probe()
3124 		err = of_property_read_u32(node, "xlnx,num-fstores",  in xilinx_dma_probe()
3132 		err = of_property_read_u32(node, "xlnx,flush-fsync",  in xilinx_dma_probe()
3139 	err = of_property_read_u32(node, "xlnx,addrwidth", &addr_width);  in xilinx_dma_probe()
3201 	for_each_child_of_node(node, child) {  in xilinx_dma_probe()
3222 	err = of_dma_controller_register(node, of_dma_xilinx_xlate,  in xilinx_dma_probe()