282 static inline struct device *tdc2dev(struct tegra_dma_channel *tdc)  in tdc2dev()  function
289 	dev_dbg(tdc2dev(tdc), "DMA Channel %d name %s register dump:\n",  in tegra_dma_dump_chan_regs()
291 	dev_dbg(tdc2dev(tdc), "CSR %x STA %x CSRE %x SRC %x DST %x\n",  in tegra_dma_dump_chan_regs()
298 	dev_dbg(tdc2dev(tdc), "MCSEQ %x IOSEQ %x WCNT %x XFER %x BSTA %x\n",  in tegra_dma_dump_chan_regs()
305 	dev_dbg(tdc2dev(tdc), "DMA ERR_STA %x\n",  in tegra_dma_dump_chan_regs()
393 		dev_err(tdc2dev(tdc), "DMA pause timed out\n");  in tegra_dma_pause()
471 		dev_dbg(tdc2dev(tdc), "%s():clearing interrupt\n", __func__);  in tegra_dma_disable()
697 		dev_err(tdc2dev(tdc), "Timeout waiting for DMA burst completion!\n");  in tegra_dma_stop_client()
792 		dev_err(tdc2dev(tdc), "cookie %d is not found\n", cookie);  in tegra_dma_tx_status()
810 		dev_err(tdc2dev(tdc), "given slave bus width is not supported\n");  in get_bus_width()
862 		dev_err(tdc2dev(tdc), "DMA direction is not supported\n");  in get_transfer_param()
879 		dev_err(tdc2dev(tdc),  in tegra_dma_prep_dma_memset()
947 		dev_err(tdc2dev(tdc),  in tegra_dma_prep_dma_memcpy()
1022 		dev_err(tdc2dev(tdc), "DMA channel is not configured\n");  in tegra_dma_prep_slave_sg()
1026 		dev_err(tdc2dev(tdc), "Invalid segment length %d\n", sg_len);  in tegra_dma_prep_slave_sg()
1089 			dev_err(tdc2dev(tdc),  in tegra_dma_prep_slave_sg()
1140 		dev_err(tdc2dev(tdc), "Invalid buffer/period len\n");  in tegra_dma_prep_dma_cyclic()
1145 		dev_err(tdc2dev(tdc), "DMA slave is not configured\n");  in tegra_dma_prep_dma_cyclic()
1158 		dev_err(tdc2dev(tdc), "buf_len is not multiple of period_len\n");  in tegra_dma_prep_dma_cyclic()
1165 		dev_err(tdc2dev(tdc), "Req len/mem address is not correct\n");  in tegra_dma_prep_dma_cyclic()
1256 		dev_err(tdc2dev(tdc), "request_irq failed for %s\n", tdc->name);  in tegra_dma_alloc_chan_resources()
1277 	dev_dbg(tdc2dev(tdc), "Freeing channel %d\n", tdc->id);  in tegra_dma_free_chan_resources()