Lines Matching refs:node
15 static int __set_clk_parents(struct device_node *node, bool clk_supplier) in __set_clk_parents() argument
21 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
25 node); in __set_clk_parents()
28 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
37 if (clkspec.np == node && !clk_supplier) { in __set_clk_parents()
46 index, node); in __set_clk_parents()
50 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_parents()
54 if (clkspec.np == node && !clk_supplier) { in __set_clk_parents()
64 index, node); in __set_clk_parents()
82 static int __set_clk_rates(struct device_node *node, bool clk_supplier) in __set_clk_rates() argument
90 count = of_property_count_u32_elems(node, "assigned-clock-rates"); in __set_clk_rates()
91 count_64 = of_property_count_u64_elems(node, "assigned-clock-rates-u64"); in __set_clk_rates()
98 rc = of_property_read_u64_array(node, in __set_clk_rates()
106 rc = of_property_read_u32_array(node, "assigned-clock-rates", in __set_clk_rates()
124 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_rates()
133 if (clkspec.np == node && !clk_supplier) { in __set_clk_rates()
143 index, node); in __set_clk_rates()
170 int of_clk_set_defaults(struct device_node *node, bool clk_supplier) in of_clk_set_defaults() argument
174 if (!node) in of_clk_set_defaults()
177 rc = __set_clk_parents(node, clk_supplier); in of_clk_set_defaults()
181 return __set_clk_rates(node, clk_supplier); in of_clk_set_defaults()