Lines Matching refs:tmp2
416 .macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup
417 dcache_line_size \tmp1, \tmp2
418 dcache_by_myline_op \op, \domain, \start, \end, \tmp1, \tmp2, \fixup
429 .macro invalidate_icache_by_line start, end, tmp1, tmp2, fixup
430 icache_line_size \tmp1, \tmp2
431 sub \tmp2, \tmp1, #1
432 bic \tmp2, \start, \tmp2
434 ic ivau, \tmp2 // invalidate I line PoU
435 add \tmp2, \tmp2, \tmp1
436 cmp \tmp2, \end
449 .macro load_ttbr1, pgtbl, tmp1, tmp2
451 offset_ttbr1 \tmp1, \tmp2
463 .macro break_before_make_ttbr_switch zero_page, page_table, tmp, tmp2
469 load_ttbr1 \page_table, \tmp, \tmp2
622 .macro tcr_clear_errata_bits, tcr, tmp1, tmp2
626 mov_q \tmp2, MIDR_FUJITSU_ERRATUM_010001_MASK
627 and \tmp1, \tmp1, \tmp2
628 mov_q \tmp2, MIDR_FUJITSU_ERRATUM_010001
629 cmp \tmp1, \tmp2
632 mov_q \tmp2, TCR_CLEAR_FUJITSU_ERRATUM_010001
633 bic \tcr, \tcr, \tmp2
743 .macro cond_yield, lbl:req, tmp:req, tmp2