Lines Matching refs:node

47 The soc node
49 This node describes the on chip SOC peripherals.  Every mpc5200 based
50 board will have this node, and as such there is a common naming
105 design supports the internal wdt, then the device node for GPT0 should
124 add the following properties to the gpt node:
127 When referencing the GPIO line from another node, the first cell must always
132 controller.  To do so, add the following properties to the gpt node:
135 When referencing the IRQ line from another node, the cell represents the
147 i2s mode.  An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
153 Each GPIO controller node should have the empty property gpio-controller and
160 The FEC node can specify one of the following properties to configure
170 Interrupt controller (fsl,mpc5200-pic) node