Lines Matching refs:CSR_WRITE_4
556 CSR_WRITE_4(sc, RL_MAR0, hashes[0]); in rl_rxfilter()
557 CSR_WRITE_4(sc, RL_MAR4, hashes[1]); in rl_rxfilter()
558 CSR_WRITE_4(sc, RL_RXCFG, rxfilt); in rl_rxfilter()
1062 CSR_WRITE_4(sc, in rl_list_tx_init()
1272 CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG); in rl_txeof()
1323 CSR_WRITE_4(sc, RL_NWAYTST, RL_NWAYTST_CBL_TEST); in rl_twister_update()
1324 CSR_WRITE_4(sc, RL_PARA78, RL_PARA78_DEF); in rl_twister_update()
1325 CSR_WRITE_4(sc, RL_PARA7C, RL_PARA7C_DEF); in rl_twister_update()
1348 CSR_WRITE_4(sc, RL_NWAYTST, RL_NWAYTST_RESET); in rl_twister_update()
1349 CSR_WRITE_4(sc, RL_PARA7C, in rl_twister_update()
1367 CSR_WRITE_4(sc, RL_PARA7C, RL_PARA7C_RETUNE); in rl_twister_update()
1373 CSR_WRITE_4(sc, RL_NWAYTST, RL_NWAYTST_CBL_TEST); in rl_twister_update()
1374 CSR_WRITE_4(sc, RL_PARA78, RL_PARA78_DEF); in rl_twister_update()
1375 CSR_WRITE_4(sc, RL_PARA7C, RL_PARA7C_DEF); in rl_twister_update()
1376 CSR_WRITE_4(sc, RL_NWAYTST, RL_NWAYTST_RESET); in rl_twister_update()
1597 CSR_WRITE_4(sc, RL_CUR_TXADDR(sc), RL_ADDR_LO(txsegs[0].ds_addr)); in rl_encap()
1645 CSR_WRITE_4(sc, RL_CUR_TXSTAT(sc), in rl_start_locked()
1717 CSR_WRITE_4(sc, RL_RXADDR, sc->rl_cdata.rl_rx_buf_paddr + in rl_init_locked()
1732 CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG); in rl_init_locked()
1733 CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG); in rl_init_locked()
1751 CSR_WRITE_4(sc, RL_MISSEDPKT, 0); in rl_init_locked()
1940 CSR_WRITE_4(sc, RL_TXADDR0 + (i * sizeof(uint32_t)), in rl_stop()