20 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_init_nvm_ops_generic()  local
24 	nvm->ops.init_params = igc_null_ops_generic;  in igc_init_nvm_ops_generic()
25 	nvm->ops.acquire = igc_null_ops_generic;  in igc_init_nvm_ops_generic()
26 	nvm->ops.read = igc_null_read_nvm;  in igc_init_nvm_ops_generic()
27 	nvm->ops.release = igc_null_nvm_generic;  in igc_init_nvm_ops_generic()
28 	nvm->ops.reload = igc_reload_nvm_generic;  in igc_init_nvm_ops_generic()
29 	nvm->ops.update = igc_null_ops_generic;  in igc_init_nvm_ops_generic()
30 	nvm->ops.validate = igc_null_ops_generic;  in igc_init_nvm_ops_generic()
31 	nvm->ops.write = igc_null_write_nvm;  in igc_init_nvm_ops_generic()
86 	usec_delay(hw->nvm.delay_usec);  in igc_raise_eec_clk()
101 	usec_delay(hw->nvm.delay_usec);  in igc_lower_eec_clk()
116 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_shift_out_eec_bits()  local
123 	if (nvm->type == igc_nvm_eeprom_spi)  in igc_shift_out_eec_bits()
135 		usec_delay(nvm->delay_usec);  in igc_shift_out_eec_bits()
261 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_standby_nvm()  local
266 	if (nvm->type == igc_nvm_eeprom_spi) {  in igc_standby_nvm()
271 		usec_delay(nvm->delay_usec);  in igc_standby_nvm()
275 		usec_delay(nvm->delay_usec);  in igc_standby_nvm()
292 	if (hw->nvm.type == igc_nvm_eeprom_spi) {  in igc_stop_nvm()
326 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_ready_nvm_eeprom()  local
332 	if (nvm->type == igc_nvm_eeprom_spi) {  in igc_ready_nvm_eeprom()
348 						 hw->nvm.opcode_bits);  in igc_ready_nvm_eeprom()
378 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_read_nvm_eerd()  local
387 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in igc_read_nvm_eerd()
426 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_write_nvm_spi()  local
435 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in igc_write_nvm_spi()
444 		ret_val = nvm->ops.acquire(hw);  in igc_write_nvm_spi()
450 			nvm->ops.release(hw);  in igc_write_nvm_spi()
458 					 nvm->opcode_bits);  in igc_write_nvm_spi()
465 		if ((nvm->address_bits == 8) && (offset >= 128))  in igc_write_nvm_spi()
469 		igc_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);  in igc_write_nvm_spi()
471 					 nvm->address_bits);  in igc_write_nvm_spi()
480 			if ((((offset + widx) * 2) % nvm->page_size) == 0) {  in igc_write_nvm_spi()
486 		nvm->ops.release(hw);  in igc_write_nvm_spi()
517 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);  in igc_read_pba_string_generic()
523 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);  in igc_read_pba_string_generic()
568 	ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);  in igc_read_pba_string_generic()
589 		ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);  in igc_read_pba_string_generic()
651 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);  in igc_validate_nvm_checksum_generic()
684 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);  in igc_update_nvm_checksum_generic()
692 	ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);  in igc_update_nvm_checksum_generic()
740 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);  in igc_get_fw_version()
742 		hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);  in igc_get_fw_version()
744 			hw->nvm.ops.read(hw, NVM_COMB_VER_OFF + comb_offset + 1,  in igc_get_fw_version()
746 			hw->nvm.ops.read(hw, NVM_COMB_VER_OFF + comb_offset,  in igc_get_fw_version()
766 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);  in igc_get_fw_version()
769 	hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);  in igc_get_fw_version()
790 		hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);  in igc_get_fw_version()
791 		hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);  in igc_get_fw_version()
795 		hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);  in igc_get_fw_version()
796 		hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);  in igc_get_fw_version()