19 	s32 ret_val = IGC_SUCCESS;  in igc_init_mac_params()
45 	s32 ret_val = IGC_SUCCESS;  in igc_init_nvm_params()
71 	s32 ret_val = IGC_SUCCESS;  in igc_init_phy_params()
100 	s32 ret_val = IGC_SUCCESS;  in igc_set_mac_type()
217 	return IGC_SUCCESS;  in igc_get_bus_info()
397 	return IGC_SUCCESS;  in igc_rar_set()
411 	return IGC_SUCCESS;  in igc_validate_mdi_setting()
440 	return IGC_SUCCESS;  in igc_check_reset_block()
457 	return IGC_SUCCESS;  in igc_read_phy_reg()
474 	return IGC_SUCCESS;  in igc_write_phy_reg()
502 	return IGC_SUCCESS;  in igc_acquire_phy()
518 	return IGC_SUCCESS;  in igc_get_phy_info()
533 	return IGC_SUCCESS;  in igc_phy_hw_reset()
555 	return IGC_SUCCESS;  in igc_set_d0_lplu_state()
577 	return IGC_SUCCESS;  in igc_set_d3_lplu_state()
688 	return IGC_SUCCESS;  in igc_write_nvm()