377 		struct tx_ring *txr = &tx_que->txr;  in igc_get_regs()
782 	struct igc_tx_queue *tx_que;  in igc_if_init()  local
798 	for (i = 0, tx_que = sc->tx_queues; i < sc->tx_num_queues; i++, tx_que++) {  in igc_if_init()
799 		struct tx_ring *txr = &tx_que->txr;  in igc_if_init()
1467 	struct igc_tx_queue *tx_que = sc->tx_queues;  in igc_if_msix_intr_assign()  local
1495 	for (i = 0; i < sc->tx_num_queues; i++, tx_que++, vector++) {  in igc_if_msix_intr_assign()
1497 		tx_que = &sc->tx_queues[i];  in igc_if_msix_intr_assign()
1500 		    IFLIB_INTR_TX, tx_que, tx_que->me, buf);  in igc_if_msix_intr_assign()
1502 		tx_que->msix = (vector % sc->rx_num_queues);  in igc_if_msix_intr_assign()
1510 		tx_que->eims = 1 << i;  in igc_if_msix_intr_assign()
1536 	struct igc_tx_queue *tx_que;  in igc_configure_queues()  local
1563 		tx_que = &sc->tx_queues[i];  in igc_configure_queues()
1566 			ivar |= (tx_que->msix | IGC_IVAR_VALID) << 24;  in igc_configure_queues()
1569 			ivar |= (tx_que->msix | IGC_IVAR_VALID) << 8;  in igc_configure_queues()
1572 		sc->que_mask |= tx_que->eims;  in igc_configure_queues()
2032 	struct igc_tx_queue *tx_que = sc->tx_queues;  in igc_if_queues_free()  local
2035 	if (tx_que != NULL) {  in igc_if_queues_free()
2036 		for (int i = 0; i < sc->tx_num_queues; i++, tx_que++) {  in igc_if_queues_free()
2037 			struct tx_ring *txr = &tx_que->txr;  in igc_if_queues_free()
2615 	struct igc_tx_queue *tx_que = sc->tx_queues;  in igc_add_hw_stats()  local
2657 	for (int i = 0; i < sc->tx_num_queues; i++, tx_que++) {  in igc_add_hw_stats()
2658 		struct tx_ring *txr = &tx_que->txr;  in igc_add_hw_stats()
2665 		    CTLTYPE_UINT | CTLFLAG_RD, tx_que,  in igc_add_hw_stats()