2765 	uint32_t wb_data[2];  in elink_update_pfc_bmac1()  local
2776 	wb_data[0] = val;  in elink_update_pfc_bmac1()
2777 	wb_data[1] = 0;  in elink_update_pfc_bmac1()
2778 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_RX_CONTROL, wb_data, 2);  in elink_update_pfc_bmac1()
2786 	wb_data[0] = val;  in elink_update_pfc_bmac1()
2787 	wb_data[1] = 0;  in elink_update_pfc_bmac1()
2788 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_TX_CONTROL, wb_data, 2);  in elink_update_pfc_bmac1()
2798 	uint32_t wb_data[2];  in elink_update_pfc_bmac2()  local
2809 	wb_data[0] = val;  in elink_update_pfc_bmac2()
2810 	wb_data[1] = 0;  in elink_update_pfc_bmac2()
2811 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_RX_CONTROL, wb_data, 2);  in elink_update_pfc_bmac2()
2820 	wb_data[0] = val;  in elink_update_pfc_bmac2()
2821 	wb_data[1] = 0;  in elink_update_pfc_bmac2()
2822 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_TX_CONTROL, wb_data, 2);  in elink_update_pfc_bmac2()
2827 		wb_data[0] = 0x0;  in elink_update_pfc_bmac2()
2828 		wb_data[0] |= (1<<0);  /* RX */  in elink_update_pfc_bmac2()
2829 		wb_data[0] |= (1<<1);  /* TX */  in elink_update_pfc_bmac2()
2830 		wb_data[0] |= (1<<2);  /* Force initial Xon */  in elink_update_pfc_bmac2()
2831 		wb_data[0] |= (1<<3);  /* 8 cos */  in elink_update_pfc_bmac2()
2832 		wb_data[0] |= (1<<5);  /* STATS */  in elink_update_pfc_bmac2()
2833 		wb_data[1] = 0;  in elink_update_pfc_bmac2()
2835 			    wb_data, 2);  in elink_update_pfc_bmac2()
2837 		wb_data[0] &= ~(1<<2);  in elink_update_pfc_bmac2()
2841 		wb_data[0] = 0x8;  in elink_update_pfc_bmac2()
2842 		wb_data[1] = 0;  in elink_update_pfc_bmac2()
2845 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2);  in elink_update_pfc_bmac2()
2856 	wb_data[0] = val;  in elink_update_pfc_bmac2()
2857 	wb_data[1] = 0;  in elink_update_pfc_bmac2()
2859 		    wb_data, 2);  in elink_update_pfc_bmac2()
2871 	wb_data[0] = val;  in elink_update_pfc_bmac2()
2872 	wb_data[1] = 0;  in elink_update_pfc_bmac2()
2873 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2);  in elink_update_pfc_bmac2()
3091 	uint32_t wb_data[2];  in elink_bmac1_enable()  local
3097 	wb_data[0] = 0x3c;  in elink_bmac1_enable()
3098 	wb_data[1] = 0;  in elink_bmac1_enable()
3100 		    wb_data, 2);  in elink_bmac1_enable()
3103 	wb_data[0] = ((params->mac_addr[2] << 24) |  in elink_bmac1_enable()
3107 	wb_data[1] = ((params->mac_addr[0] << 8) |  in elink_bmac1_enable()
3109 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_TX_SOURCE_ADDR, wb_data, 2);  in elink_bmac1_enable()
3117 	wb_data[0] = val;  in elink_bmac1_enable()
3118 	wb_data[1] = 0;  in elink_bmac1_enable()
3119 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_BMAC_CONTROL, wb_data, 2);  in elink_bmac1_enable()
3122 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac1_enable()
3123 	wb_data[1] = 0;  in elink_bmac1_enable()
3124 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_RX_MAX_SIZE, wb_data, 2);  in elink_bmac1_enable()
3129 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac1_enable()
3130 	wb_data[1] = 0;  in elink_bmac1_enable()
3131 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_TX_MAX_SIZE, wb_data, 2);  in elink_bmac1_enable()
3134 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac1_enable()
3135 	wb_data[1] = 0;  in elink_bmac1_enable()
3136 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_CNT_MAX_SIZE, wb_data, 2);  in elink_bmac1_enable()
3139 	wb_data[0] = 0x1000200;  in elink_bmac1_enable()
3140 	wb_data[1] = 0;  in elink_bmac1_enable()
3142 		    wb_data, 2);  in elink_bmac1_enable()
3146 		wb_data[0] = 0xf000;  in elink_bmac1_enable()
3147 		wb_data[1] = 0;  in elink_bmac1_enable()
3149 			    wb_data, 2);  in elink_bmac1_enable()
3164 	uint32_t wb_data[2];  in elink_bmac2_enable()  local
3168 	wb_data[0] = 0;  in elink_bmac2_enable()
3169 	wb_data[1] = 0;  in elink_bmac2_enable()
3170 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2);  in elink_bmac2_enable()
3174 	wb_data[0] = 0x3c;  in elink_bmac2_enable()
3175 	wb_data[1] = 0;  in elink_bmac2_enable()
3177 		    wb_data, 2);  in elink_bmac2_enable()
3182 	wb_data[0] = ((params->mac_addr[2] << 24) |  in elink_bmac2_enable()
3186 	wb_data[1] = ((params->mac_addr[0] << 8) |  in elink_bmac2_enable()
3189 		    wb_data, 2);  in elink_bmac2_enable()
3194 	wb_data[0] = 0x1000200;  in elink_bmac2_enable()
3195 	wb_data[1] = 0;  in elink_bmac2_enable()
3197 		    wb_data, 2);  in elink_bmac2_enable()
3201 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac2_enable()
3202 	wb_data[1] = 0;  in elink_bmac2_enable()
3203 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_RX_MAX_SIZE, wb_data, 2);  in elink_bmac2_enable()
3207 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac2_enable()
3208 	wb_data[1] = 0;  in elink_bmac2_enable()
3209 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_TX_MAX_SIZE, wb_data, 2);  in elink_bmac2_enable()
3212 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD - 2;  in elink_bmac2_enable()
3213 	wb_data[1] = 0;  in elink_bmac2_enable()
3214 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_CNT_MAX_SIZE, wb_data, 2);  in elink_bmac2_enable()
3270 	uint32_t wb_data[2];  in elink_set_bmac_rx()  local
3282 		REG_RD_DMAE(sc, bmac_addr, wb_data, 2);  in elink_set_bmac_rx()
3284 			wb_data[0] |= ELINK_BMAC_CONTROL_RX_ENABLE;  in elink_set_bmac_rx()
3286 			wb_data[0] &= ~ELINK_BMAC_CONTROL_RX_ENABLE;  in elink_set_bmac_rx()
3287 		REG_WR_DMAE(sc, bmac_addr, wb_data, 2);  in elink_set_bmac_rx()
14818 		uint32_t wb_data[2];  in elink_check_half_open_conn()  local
14827 		REG_RD_DMAE(sc, mac_base + lss_status_reg, wb_data, 2);  in elink_check_half_open_conn()
14828 		lss_status = (wb_data[0] > 0);  in elink_check_half_open_conn()