754 	val = CSR_READ_4(sc, BWI_ID_HI);  in bwi_regwin_info()
788 		info = CSR_READ_4(sc, BWI_INFO);  in bwi_bbp_attach()
793 		sc->sc_cap = CSR_READ_4(sc, BWI_CAPABILITY);  in bwi_bbp_attach()
920 		val = CSR_READ_4(sc, BWI_FLAGS);  in bwi_bus_init()
977 			CSR_READ_4(sc, BWI_BUS_ADDR); /* Flush */  in bwi_bus_init()
979 			CSR_READ_4(sc, BWI_BUS_DATA); /* Flush */  in bwi_bus_init()
1066 		val = CSR_READ_4(sc, BWI_CLOCK_CTRL);  in bwi_get_clock_freq()
1079 		val = CSR_READ_4(sc, BWI_CLOCK_INFO);  in bwi_get_clock_freq()
1127 	clk_ctrl = CSR_READ_4(sc, BWI_CLOCK_CTRL);  in bwi_set_clock_mode()
1250 			if ((CSR_READ_4(sc, BWI_TXSTATUS0) &  in bwi_init_statechg()
1253 			CSR_READ_4(sc, BWI_TXSTATUS1);  in bwi_init_statechg()
1474 		CSR_READ_4(sc, BWI_MAC_INTR_MASK);  in bwi_stop_locked()
1522 	intr_status = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);  in bwi_intr()
1530 	intr_status &= CSR_READ_4(sc, BWI_MAC_INTR_MASK);  in bwi_intr()
1551 		CSR_READ_4(sc, BWI_TXRX_INTR_STATUS(i)) & mask;  in bwi_intr()
1615 			if ((CSR_READ_4(sc, BWI_MAC_PS_STATUS) & 0x8) == 0)  in bwi_intr()
2687 	val = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);  in bwi_rxeof32()
2718 		status = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);  in bwi_reset_rx_ring32()
2774 		val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);  in bwi_free_tx_ring32()
2791 		val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);  in bwi_free_tx_ring32()
3279 	val = CSR_READ_4(sc, ctrl_base + BWI_RX32_STATUS);  in bwi_txeof_status32()
3396 		tx_status0 = CSR_READ_4(sc, BWI_TXSTATUS0);  in bwi_txeof()
3399 		tx_status1 = CSR_READ_4(sc, BWI_TXSTATUS1);  in bwi_txeof()
3449 	val = CSR_READ_4(sc, BWI_PLL_ON_DELAY);  in bwi_get_pwron_delay()
3500 	busrev = __SHIFTOUT(CSR_READ_4(sc, BWI_ID_LO), BWI_ID_LO_BUSREV_MASK);  in bwi_regwin_disable_bits()
3518 	val = CSR_READ_4(sc, BWI_STATE_LO);  in bwi_regwin_is_enabled()
3539 	state_lo = CSR_READ_4(sc, BWI_STATE_LO);  in bwi_regwin_disable()
3563 		state_lo = CSR_READ_4(sc, BWI_STATE_LO);  in bwi_regwin_disable()
3576 		state_hi = CSR_READ_4(sc, BWI_STATE_HI);  in bwi_regwin_disable()
3596 	CSR_READ_4(sc, BWI_STATE_LO);  in bwi_regwin_disable()
3605 	CSR_READ_4(sc, BWI_STATE_LO);  in bwi_regwin_disable()
3624 	CSR_READ_4(sc, BWI_STATE_LO);  in bwi_regwin_enable()
3627 	state_hi = CSR_READ_4(sc, BWI_STATE_HI);  in bwi_regwin_enable()
3631 	imstate = CSR_READ_4(sc, BWI_IMSTATE);  in bwi_regwin_enable()
3644 	CSR_READ_4(sc, BWI_STATE_LO);  in bwi_regwin_enable()
3653 	CSR_READ_4(sc, BWI_STATE_LO);  in bwi_regwin_enable()