Lines Matching refs:HBC_MessageUnit
288 …intmask_org = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_mask); /* disable outbound message0 int… in arcmsr_disable_allintr()
289 CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE); in arcmsr_disable_allintr()
335 CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org & mask); in arcmsr_enable_allintr()
410 …if(CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)… in arcmsr_hbc_wait_msgint_ready()
411 …CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DON… in arcmsr_hbc_wait_msgint_ready()
504 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); in arcmsr_flush_hbc_cache()
505 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); in arcmsr_flush_hbc_cache()
672 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD); in arcmsr_abort_hbc_allcmd()
673 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); in arcmsr_abort_hbc_allcmd()
928 …while((CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)… in arcmsr_done4abort_postqueue()
929 flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low); in arcmsr_done4abort_postqueue()
1118 CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_high, cdb_phyaddr_hi32); in arcmsr_post_srb()
1119 CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp); in arcmsr_post_srb()
1123 CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp); in arcmsr_post_srb()
1204 struct HBC_MessageUnit *phbcmu = (struct HBC_MessageUnit *)acb->pmu; in arcmsr_get_iop_rqbuffer()
1249 struct HBC_MessageUnit *phbcmu = (struct HBC_MessageUnit *)acb->pmu; in arcmsr_get_iop_wqbuffer()
1292 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK); in arcmsr_iop_message_read()
1338 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK); in arcmsr_iop_message_wrote()
1396 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB); in arcmsr_stop_hbc_bgrb()
1397 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); in arcmsr_stop_hbc_bgrb()
1762 devicemap = offsetof(struct HBC_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); in arcmsr_dr_handle()
1871 …CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DON… in arcmsr_hbc_message_isr()
1872 outbound_message = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[0]); in arcmsr_hbc_message_isr()
1942 doorbell_status = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell); in arcmsr_hbc_doorbell_isr()
1943 …CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, doorbell_status); /* clear doorbell … in arcmsr_hbc_doorbell_isr()
2117 flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low); in arcmsr_hbc_postqueue_isr()
2125 … CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING); in arcmsr_hbc_postqueue_isr()
2128 …} while(CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR… in arcmsr_hbc_postqueue_isr()
2324 host_interrupt_status = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & in arcmsr_handle_hbc_isr()
2340 host_interrupt_status = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status); in arcmsr_handle_hbc_isr()
2497 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); in arcmsr_polling_devmap()
2498 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); in arcmsr_polling_devmap()
3400 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB); in arcmsr_start_hbc_bgrb()
3401 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); in arcmsr_start_hbc_bgrb()
3585 …if(!(CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)) { in arcmsr_polling_hbc_srbdone()
3599 flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low); in arcmsr_polling_hbc_srbdone()
3864 …size_t iop_firm_model = offsetof(struct HBC_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_MODEL_OFFSET]);… in arcmsr_get_hbc_config()
3865 …size_t iop_firm_version = offsetof(struct HBC_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET])… in arcmsr_get_hbc_config()
3866 size_t iop_device_map = offsetof(struct HBC_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); in arcmsr_get_hbc_config()
3869 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); in arcmsr_get_hbc_config()
3870 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); in arcmsr_get_hbc_config()
3895 …acb->firm_request_len = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_l… in arcmsr_get_hbc_config()
3896 …acb->firm_numbers_queue = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers… in arcmsr_get_hbc_config()
3897 …acb->firm_sdram_size = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size… in arcmsr_get_hbc_config()
3898 …acb->firm_ide_channels = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_chan… in arcmsr_get_hbc_config()
3899 …acb->firm_cfg_version = CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFS… in arcmsr_get_hbc_config()
4126 …while ((CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_msgaddr1) & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK)… in arcmsr_wait_firmware_ready()
4189 outbound_doorbell = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell); in arcmsr_clear_doorbell_queue_buffer()
4190 …CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, outbound_doorbell); /*clear doorbell… in arcmsr_clear_doorbell_queue_buffer()
4191 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK); in arcmsr_clear_doorbell_queue_buffer()
4192 CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell_clear); /* Dummy read to force pci flush */ in arcmsr_clear_doorbell_queue_buffer()
4193 CHIP_REG_READ32(HBC_MessageUnit, 0, inbound_doorbell); /* Dummy read to force pci flush */ in arcmsr_clear_doorbell_queue_buffer()
4284 CHIP_REG_WRITE32(HBC_MessageUnit, 0, msgcode_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG); in arcmsr_iop_confirm()
4285 CHIP_REG_WRITE32(HBC_MessageUnit, 0, msgcode_rwbuffer[1], srb_phyaddr_hi32); in arcmsr_iop_confirm()
4286 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG); in arcmsr_iop_confirm()
4287 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); in arcmsr_iop_confirm()