213 		seq_puts(m, "\n");  in rtw89_debug_priv_read_reg_get()
370 			seq_puts(m, "\n");  in rtw89_debug_priv_rf_reg_dump_get()
372 		seq_puts(m, "\n");  in rtw89_debug_priv_rf_reg_dump_get()
593 		seq_puts(m, #_regd "\n"); \
633 	seq_puts(m, "[Regulatory] ");  in rtw89_debug_priv_txpwr_table_get()
636 	seq_puts(m, "[SAR]\n");  in rtw89_debug_priv_txpwr_table_get()
639 	seq_puts(m, "\n[TX power byrate]\n");  in rtw89_debug_priv_txpwr_table_get()
644 	seq_puts(m, "\n[TX power limit]\n");  in rtw89_debug_priv_txpwr_table_get()
649 	seq_puts(m, "\n[TX power limit_ru]\n");  in rtw89_debug_priv_txpwr_table_get()
712 		seq_puts(m, "Debug selected MAC page 0x00\n");  in rtw89_debug_priv_mac_reg_dump_get()
717 		seq_puts(m, "Debug selected MAC page 0x30\n");  in rtw89_debug_priv_mac_reg_dump_get()
722 		seq_puts(m, "Debug selected MAC page 0x40\n");  in rtw89_debug_priv_mac_reg_dump_get()
727 		seq_puts(m, "Debug selected MAC page 0x80\n");  in rtw89_debug_priv_mac_reg_dump_get()
732 		seq_puts(m, "Debug selected MAC page 0xc0\n");  in rtw89_debug_priv_mac_reg_dump_get()
737 		seq_puts(m, "Debug selected MAC page 0xe0\n");  in rtw89_debug_priv_mac_reg_dump_get()
742 		seq_puts(m, "Debug selected BB register\n");  in rtw89_debug_priv_mac_reg_dump_get()
747 		seq_puts(m, "Debug selected IQK register\n");  in rtw89_debug_priv_mac_reg_dump_get()
752 		seq_puts(m, "Debug selected RFC register\n");  in rtw89_debug_priv_mac_reg_dump_get()
757 		seq_puts(m, "Selected invalid register page\n");  in rtw89_debug_priv_mac_reg_dump_get()
769 			seq_puts(m, "\n");  in rtw89_debug_priv_mac_reg_dump_get()
839 			seq_puts(m, "\n");  in rtw89_debug_dump_mac_mem()
1007 		seq_puts(m, "[DLE]  : DMAC not enabled\n");  in rtw89_debug_mac_dump_dle_dbg()
1054 		seq_puts(m, "[DMAC] : DMAC not enabled\n");  in rtw89_debug_mac_dump_dmac_dbg()
1311 			seq_puts(m, "[CMAC] : CMAC1 not enabled\n");  in rtw89_debug_mac_dump_cmac_err()
1313 			seq_puts(m, "[CMAC] : CMAC0 not enabled\n");  in rtw89_debug_mac_dump_cmac_err()
2222 		seq_puts(m, "Enable PTCL C0 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2229 		seq_puts(m, "Enable PTCL C1 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2236 		seq_puts(m, "Enable SCH C0 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2243 		seq_puts(m, "Enable SCH C1 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2260 		seq_puts(m, "Enable TMAC C0 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2277 		seq_puts(m, "Enable TMAC C1 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2299 		seq_puts(m, "Enable RMAC C0 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2321 		seq_puts(m, "Enable RMAC C1 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2325 		seq_puts(m, "Enable RMAC state C0 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2329 		seq_puts(m, "Enable RMAC state C1 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2333 		seq_puts(m, "Enable RMAC PLCP C0 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2337 		seq_puts(m, "Enable RMAC PLCP C1 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2349 		seq_puts(m, "Enable TRXPTCL C0 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2361 		seq_puts(m, "Enable TRXPTCL C1 dbgport.\n");  in rtw89_debug_mac_dbg_port_sel()
2368 		seq_puts(m, "Enable tx infol dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2375 		seq_puts(m, "Enable tx infoh dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2382 		seq_puts(m, "Enable tx infol dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2389 		seq_puts(m, "Enable tx infoh dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2396 		seq_puts(m, "Enable tx tf infol dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2403 		seq_puts(m, "Enable tx tf infoh dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2410 		seq_puts(m, "Enable tx tf infol dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2417 		seq_puts(m, "Enable tx tf infoh dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2421 		seq_puts(m, "Enable wde bufmgn freepg dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2425 		seq_puts(m, "Enable wde bufmgn quota dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2429 		seq_puts(m, "Enable wde bufmgn pagellt dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2433 		seq_puts(m, "Enable wde bufmgn pktinfo dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2437 		seq_puts(m, "Enable wde quemgn prepkt dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2441 		seq_puts(m, "Enable wde quemgn nxtpkt dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2445 		seq_puts(m, "Enable wde quemgn qlnktbl dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2449 		seq_puts(m, "Enable wde quemgn qempty dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2453 		seq_puts(m, "Enable ple bufmgn freepg dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2457 		seq_puts(m, "Enable ple bufmgn quota dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2461 		seq_puts(m, "Enable ple bufmgn pagellt dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2465 		seq_puts(m, "Enable ple bufmgn pktinfo dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2469 		seq_puts(m, "Enable ple quemgn prepkt dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2473 		seq_puts(m, "Enable ple quemgn nxtpkt dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2477 		seq_puts(m, "Enable ple quemgn qlnktbl dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2481 		seq_puts(m, "Enable ple quemgn qempty dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2485 		seq_puts(m, "Enable pktinfo dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2512 		seq_puts(m, "Enable Dispatcher hdt tx6 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2520 		seq_puts(m, "Enable Dispatcher hdt tx7 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2528 		seq_puts(m, "Enable Dispatcher hdt tx8 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2548 		seq_puts(m, "Enable Dispatcher hdt txD dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2556 		seq_puts(m, "Enable Dispatcher cdt tx0 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2564 		seq_puts(m, "Enable Dispatcher cdt tx1 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2572 		seq_puts(m, "Enable Dispatcher cdt tx3 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2580 		seq_puts(m, "Enable Dispatcher cdt tx4 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2600 		seq_puts(m, "Enable Dispatcher cdt tx9 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2619 		seq_puts(m, "Enable Dispatcher hdt rx0 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2637 		seq_puts(m, "Enable Dispatcher hdt rx3 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2645 		seq_puts(m, "Enable Dispatcher hdt rx4 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2653 		seq_puts(m, "Enable Dispatcher hdt rx5 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2661 		seq_puts(m, "Enable Dispatcher cdt rx part0 0 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2670 		seq_puts(m, "Enable Dispatcher cdt rx part0 1 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2678 		seq_puts(m, "Enable Dispatcher cdt rx part0 2 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2684 		seq_puts(m, "Enable Dispatcher cdt rx part1 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2690 		seq_puts(m, "Enable Dispatcher stf control dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2696 		seq_puts(m, "Enable Dispatcher addr control dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2702 		seq_puts(m, "Enable Dispatcher wde interface dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2708 		seq_puts(m, "Enable Dispatcher ple interface dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2714 		seq_puts(m, "Enable Dispatcher flow control dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2722 		seq_puts(m, "Enable pcie txdma dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2730 		seq_puts(m, "Enable pcie rxdma dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2738 		seq_puts(m, "Enable pcie cvt dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2746 		seq_puts(m, "Enable pcie cxpl dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2754 		seq_puts(m, "Enable pcie io dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2762 		seq_puts(m, "Enable pcie misc dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2770 		seq_puts(m, "Enable pcie misc2 dump.\n");  in rtw89_debug_mac_dbg_port_sel()
2773 		seq_puts(m, "Dbg port select err\n");  in rtw89_debug_mac_dbg_port_sel()
2827 		seq_puts(m, "Dump debug port " #__sel ":\n"); \  in rtw89_debug_mac_dbg_port_dump()
3323 	seq_puts(m, "]\n");  in rtw89_sta_info_get_iter()
3325 	seq_puts(m, "EVM: [");  in rtw89_sta_info_get_iter()
3334 	seq_puts(m, "]\t");  in rtw89_sta_info_get_iter()
3392 	seq_puts(m, "RX count:\n");  in rtw89_debug_priv_phy_info_get()
3404 			seq_puts(m, "][");  in rtw89_debug_priv_phy_info_get()
3408 		seq_puts(m, "]\n");  in rtw89_debug_priv_phy_info_get()
3433 		seq_puts(m, "\n");  in rtw89_dump_addr_cam()
3459 	seq_puts(m, "\n");  in rtw89_dump_pkt_offload()
3484 			seq_puts(m, "\tba_cam ");  in rtw89_dump_ba_cam()
3487 			seq_puts(m, ", ");  in rtw89_dump_ba_cam()
3492 	seq_puts(m, "\n");  in rtw89_dump_ba_cam()
3515 	seq_puts(m, "map:\n");  in rtw89_debug_priv_stations_get()