303 pmu_parse_event(struct pmu_event_desc *ped, const char *eventin)  in pmu_parse_event()  argument
312 	bzero(ped, sizeof(*ped));  in pmu_parse_event()
313 	ped->ped_period = DEFAULT_SAMPLE_COUNT;  in pmu_parse_event()
314 	ped->ped_umask = -1;  in pmu_parse_event()
321 			ped->ped_umask = strtol(value, NULL, 16);  in pmu_parse_event()
323 			ped->ped_event = strtol(value, NULL, 16);  in pmu_parse_event()
325 			ped->ped_period = strtol(value, NULL, 10);  in pmu_parse_event()
327 			ped->ped_offcore_rsp = strtol(value, NULL, 16);  in pmu_parse_event()
329 			ped->ped_any = strtol(value, NULL, 10);  in pmu_parse_event()
331 			ped->ped_cmask = strtol(value, NULL, 10);  in pmu_parse_event()
333 			ped->ped_inv = strtol(value, NULL, 10);  in pmu_parse_event()
335 			ped->ped_edge = strtol(value, NULL, 10);  in pmu_parse_event()
337 			ped->ped_frontend = strtol(value, NULL, 16);  in pmu_parse_event()
339 			ped->ped_ldlat = strtol(value, NULL, 16);  in pmu_parse_event()
341 			ped->ped_fc_mask = strtol(value, NULL, 16);  in pmu_parse_event()
343 			ped->ped_ch_mask = strtol(value, NULL, 16);  in pmu_parse_event()
345 			ped->ped_config1 = strtol(value, NULL, 16);  in pmu_parse_event()
347 			ped->ped_l3_thread = strtol(value, NULL, 16);  in pmu_parse_event()
349 			ped->ped_l3_slice = strtol(value, NULL, 16);  in pmu_parse_event()
364 	struct pmu_event_desc ped;  in pmc_pmu_sample_rate_get()  local
371 	if (pmu_parse_event(&ped, pe->event))  in pmc_pmu_sample_rate_get()
373 	return (ped.ped_period);  in pmc_pmu_sample_rate_get()
388 	struct pmu_event_desc ped;  in pmc_pmu_print_counters()  local
406 			pmu_parse_event(&ped, pe->event);  in pmc_pmu_print_counters()
487 	struct pmu_event_desc *ped)  in pmc_pmu_amd_pmcallocate()  argument
494 	if (ped->ped_umask > 0) {  in pmc_pmu_amd_pmcallocate()
496 		amd->pm_amd_config |= AMD_PMC_TO_UNITMASK(ped->ped_umask);  in pmc_pmu_amd_pmcallocate()
502 		amd->pm_amd_config |= AMD_PMC_TO_EVENTMASK(ped->ped_event);  in pmc_pmu_amd_pmcallocate()
504 		amd->pm_amd_config |= AMD_PMC_TO_L3SLICE(ped->ped_l3_slice);  in pmc_pmu_amd_pmcallocate()
505 		amd->pm_amd_config |= AMD_PMC_TO_L3CORE(ped->ped_l3_thread);  in pmc_pmu_amd_pmcallocate()
509 		amd->pm_amd_config |= AMD_PMC_TO_EVENTMASK_DF(ped->ped_event);  in pmc_pmu_amd_pmcallocate()
513 		amd->pm_amd_config |= AMD_PMC_TO_EVENTMASK(ped->ped_event);  in pmc_pmu_amd_pmcallocate()
523 		if (ped->ped_edge)  in pmc_pmu_amd_pmcallocate()
525 		if (ped->ped_inv)  in pmc_pmu_amd_pmcallocate()
535 	struct pmu_event_desc *ped)  in pmc_pmu_intel_pmcallocate()  argument
544 	} else if (ped->ped_event == 0x0) {  in pmc_pmu_intel_pmcallocate()
550 	iap->pm_iap_config |= IAP_EVSEL(ped->ped_event);  in pmc_pmu_intel_pmcallocate()
551 	if (ped->ped_umask > 0)  in pmc_pmu_intel_pmcallocate()
552 		iap->pm_iap_config |= IAP_UMASK(ped->ped_umask);  in pmc_pmu_intel_pmcallocate()
553 	iap->pm_iap_config |= IAP_CMASK(ped->ped_cmask);  in pmc_pmu_intel_pmcallocate()
554 	iap->pm_iap_rsp = ped->ped_offcore_rsp;  in pmc_pmu_intel_pmcallocate()
564 	if (ped->ped_edge)  in pmc_pmu_intel_pmcallocate()
566 	if (ped->ped_any)  in pmc_pmu_intel_pmcallocate()
568 	if (ped->ped_inv)  in pmc_pmu_intel_pmcallocate()
579 	struct pmu_event_desc ped;  in pmc_pmu_pmcallocate_md()  local
596 	if (pmu_parse_event(&ped, pe->event))  in pmc_pmu_pmcallocate_md()
600 		return (pmc_pmu_intel_pmcallocate(event_name, pm, &ped));  in pmc_pmu_pmcallocate_md()
602 		return (pmc_pmu_amd_pmcallocate(event_name, pm, &ped));  in pmc_pmu_pmcallocate_md()
611 	struct pmu_event_desc ped;  in pmc_pmu_pmcallocate_md()  local
622 	if (pmu_parse_event(&ped, pe->event))  in pmc_pmu_pmcallocate_md()
625 	assert(ped.ped_event >= 0);  in pmc_pmu_pmcallocate_md()
627 	pm->pm_md.pm_event = ped.ped_event;  in pmc_pmu_pmcallocate_md()
638 	struct pmu_event_desc ped;  in pmc_pmu_pmcallocate_md()  local
646 	if (pmu_parse_event(&ped, pe->event))  in pmc_pmu_pmcallocate_md()
651 	pm->pm_md.pm_md_config = ped.ped_event;  in pmc_pmu_pmcallocate_md()