Lines Matching refs:OP_AddImm

16702 #define OP_AddImm         86 /* synopsis: r[P1]=r[P1]+P2                   */  macro
95144 case OP_AddImm: {            /* in1 */
114069       sqlite3VdbeAddOp2(v, OP_AddImm, target, 0);
116579     sqlite3VdbeAddOp2(v, OP_AddImm, r1, -2);
128154       sqlite3VdbeAddOp2(v, OP_AddImm, memCnt, 1);
133372       /* 6  */ {OP_AddImm,  0,  0, 0},
134477     sqlite3VdbeAddOp2(v, OP_AddImm, regRowCount, 1);
135214           sqlite3VdbeAddOp2(v, OP_AddImm, regTrigCnt, 1); /* incr trigger cnt */
135495           sqlite3VdbeAddOp2(v, OP_AddImm, regTrigCnt, 1); /* incr trigger cnt */
139571     sqlite3VdbeAddOp2(v, OP_AddImm, 1, -1);
140566         loopTop = sqlite3VdbeAddOp2(v, OP_AddImm, 7, 1);
140777             sqlite3VdbeAddOp2(v, OP_AddImm, 8+j, 1);/* increment entry count */
140895         { OP_AddImm,      1, 0,        0},    /* 0 */
144634       sqlite3VdbeAddOp2(v, OP_AddImm, p->iLimit, -1);
154393     sqlite3VdbeAddOp2(v, OP_AddImm, regRowCount, 1);
171039         sqlite3VdbeAddOp2(v, OP_AddImm, pWin->regApp+1, 1);
171055       sqlite3VdbeAddOp2(v, OP_AddImm, pWin->regApp+1-bInverse, 1);
171314           sqlite3VdbeAddOp2(v, OP_AddImm, tmpReg, val);
171668         sqlite3VdbeAddOp2(v, OP_AddImm, pMWin->regStartRowid, 1);
171680         sqlite3VdbeAddOp2(v, OP_AddImm, pMWin->regEndRowid, 1);