Lines Matching refs:ModelName

327       SchedModels.getModelForProc(Processor).ModelName;  in CPUKeyValues()
670 OS << "\nstatic const unsigned " << ProcModel.ModelName in EmitProcessorResourceSubUnits()
709 OS << ProcModel.ModelName << "RegisterFiles,\n " << (1 + NumRegisterFiles); in EmitRegisterFileInfo()
715 OS << ProcModel.ModelName << "RegisterCosts,\n "; in EmitRegisterFileInfo()
731 OS << "static const llvm::MCRegisterCostEntry " << ProcModel.ModelName in EmitRegisterFileTables()
754 OS << "static const llvm::MCRegisterFileDesc " << ProcModel.ModelName in EmitRegisterFileTables()
801 OS << "\nstatic const llvm::MCExtraProcessorInfo " << ProcModel.ModelName in EmitExtraProcessorInfo()
823 OS << "static const llvm::MCProcResourceDesc " << ProcModel.ModelName in EmitProcessorResources()
860 OS << ProcModel.ModelName << "ProcResourceSubUnits + " in EmitProcessorResources()
894 "defined for processor " + ProcModel.ModelName + in FindWriteResources()
911 ProcModel.ModelName); in FindWriteResources()
946 "defined for processor " + ProcModel.ModelName + in FindReadAdvance()
963 ProcModel.ModelName); in FindReadAdvance()
1104 LLVM_DEBUG(dbgs() << ProcModel.ModelName in GenSchedClassTables()
1401 << PI->ModelName << "SchedClasses[] = {\n"; in EmitSchedClassTables()
1429 OS << "}; // " << PI->ModelName << "SchedClasses\n"; in EmitSchedClassTables()
1448 OS << "static const llvm::MCSchedModel " << PM.ModelName << " = {\n"; in EmitProcessorModels()
1476 OS << " " << PM.ModelName << "ProcResources" << ",\n" in EmitProcessorModels()
1477 << " " << PM.ModelName << "SchedClasses" << ",\n" in EmitProcessorModels()
1489 OS << " &" << PM.ModelName << "ExtraInfo,\n"; in EmitProcessorModels()
1696 OS << "{ // " << (SchedModels.procModelBegin() + PI)->ModelName << '\n'; in emitSchedModelHelpersImpl()