137   const auto &RegisterClasses = Bank.getRegClasses();  in runEnums()  local
138   if (!RegisterClasses.empty()) {  in runEnums()
141     assert(RegisterClasses.size() <= 0xffff &&  in runEnums()
148     for (const auto &RC : RegisterClasses)  in runEnums()
1015   const auto &RegisterClasses = RegBank.getRegClasses();  in runMCDesc()  local
1023   for (const auto &RC : RegisterClasses) {  in runMCDesc()
1059   for (const auto &RC : RegisterClasses) {  in runMCDesc()
1103      << RegisterClasses.size() << ", " << TargetName << "RegUnitRoots, "  in runMCDesc()
1176   const auto &RegisterClasses = RegBank.getRegClasses();  in runTargetHeader()  local
1177   if (llvm::any_of(RegisterClasses, [](const auto &RC) { return RC.getBaseClassOrder(); })) {  in runTargetHeader()
1183   if (!RegisterClasses.empty()) {  in runTargetHeader()
1184     OS << "namespace " << RegisterClasses.front().Namespace  in runTargetHeader()
1187     for (const auto &RC : RegisterClasses) {  in runTargetHeader()
1193     OS << "} // end namespace " << RegisterClasses.front().Namespace << "\n\n";  in runTargetHeader()
1217   const auto &RegisterClasses = RegBank.getRegClasses();  in runTargetDesc()  local
1224   for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1237     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1271   if (!RegisterClasses.empty()) {  in runTargetDesc()
1282       for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1323     SmallVector<IdxList, 8> SuperRegIdxLists(RegisterClasses.size());  in runTargetDesc()
1325     BitVector MaskBV(RegisterClasses.size());  in runTargetDesc()
1327     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1355     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1370     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1402     OS << "\nnamespace " << RegisterClasses.front().Namespace  in runTargetDesc()
1405     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1430     OS << "} // end namespace " << RegisterClasses.front().Namespace << "\n";  in runTargetDesc()
1435   for (const auto &RC : RegisterClasses)  in runTargetDesc()
1506     if (RegisterClasses.size() <= UINT8_MAX)  in runTargetDesc()
1508     else if (RegisterClasses.size() <= UINT16_MAX)  in runTargetDesc()
1512     OS << RegisterClasses.size() << "][" << SubRegIndicesSize << "] = {\n";  in runTargetDesc()
1513     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1537     if (RegisterClasses.size() <= UINT8_MAX)  in runTargetDesc()
1539     else if (RegisterClasses.size() <= UINT16_MAX)  in runTargetDesc()
1544     OS << RegisterClasses.size() << "][" << SubRegIndicesSize << "] = {\n";  in runTargetDesc()
1546     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1581   if (!RegisterClasses.empty()) {  in runTargetDesc()
1584     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1651      << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() << ",\n"  in runTargetDesc()
1658      << "MCRegisterClasses, " << RegisterClasses.size() << ",\n"  in runTargetDesc()