Lines Matching refs:SCIdx

904     unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, /*ProcIndices*/{0});  in collectSchedClasses()  local
905 InstrClassMap[Inst->TheDef] = SCIdx; in collectSchedClasses()
926 unsigned SCIdx = getSchedClassIdx(*Inst); in collectSchedClasses() local
927 if (!SCIdx) { in collectSchedClasses()
934 CodeGenSchedClass &SC = getSchedClass(SCIdx); in collectSchedClasses()
956 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs; in collectSchedClasses()
1079 unsigned SCIdx = Pos->second; in createInstRWClass() local
1080 ClassInstrs[SCIdx].push_back(InstDef); in createInstRWClass()
1125 unsigned SCIdx = SchedClasses.size(); in createInstRWClass() local
1126 SchedClasses.emplace_back(SCIdx, createSchedClassName(InstDefs), nullptr); in createInstRWClass()
1128 LLVM_DEBUG(dbgs() << "InstRW: New SC " << SCIdx << ":" << SC.Name << " on " in createInstRWClass()
1158 InstrClassMap[InstDef] = SCIdx; in createInstRWClass()
1289 void CodeGenSchedModels::inferFromInstRWs(unsigned SCIdx) { in inferFromInstRWs() argument
1290 for (unsigned I = 0, E = SchedClasses[SCIdx].InstRWs.size(); I != E; ++I) { in inferFromInstRWs()
1291 assert(SchedClasses[SCIdx].InstRWs.size() == E && "InstrRWs was mutated!"); in inferFromInstRWs()
1292 Record *Rec = SchedClasses[SCIdx].InstRWs[I]; in inferFromInstRWs()
1296 if (InstrClassMap[*II] == SCIdx) in inferFromInstRWs()
1306 inferFromRW(Writes, Reads, SCIdx, PIdx); // May mutate SchedClasses. in inferFromInstRWs()
1307 SchedClasses[SCIdx].InstRWProcIndices.insert(PIdx); in inferFromInstRWs()
2010 unsigned SCIdx = getSchedClassIdx(*Inst); in checkCompleteness() local
2011 if (!SCIdx) { in checkCompleteness()
2022 const CodeGenSchedClass &SC = getSchedClass(SCIdx); in checkCompleteness()