Lines Matching refs:RC
991 CodeGenRegisterClass &RC = *I; in computeSubClasses() local
992 RC.SubClasses.resize(RegClasses.size()); in computeSubClasses()
993 RC.SubClasses.set(RC.EnumValue); in computeSubClasses()
994 if (RC.Artificial) in computeSubClasses()
1000 if (RC.SubClasses.test(SubRC.EnumValue)) in computeSubClasses()
1002 if (!testSubClass(&RC, &SubRC)) in computeSubClasses()
1006 RC.SubClasses |= SubRC.SubClasses; in computeSubClasses()
1010 for (auto I2 = std::next(I); I2 != E && testSubClass(&RC, &*I2); ++I2) in computeSubClasses()
1011 RC.SubClasses.set(I2->EnumValue); in computeSubClasses()
1015 for (auto &RC : RegClasses) { in computeSubClasses() local
1016 const BitVector &SC = RC.getSubClasses(); in computeSubClasses()
1022 if (&*I == &RC) in computeSubClasses()
1024 I->SuperClasses.push_back(&RC); in computeSubClasses()
1031 for (auto &RC : RegClasses) in computeSubClasses() local
1032 if (!RC.getDef()) in computeSubClasses()
1033 RC.inheritProperties(RegBank); in computeSubClasses()
1059 for (auto &RC : RegClasses) in getMatchingSubClassWithSubRegs() local
1060 if (SuperRegRCsBV[RC.EnumValue]) in getMatchingSubClassWithSubRegs()
1061 SuperRegRCs.emplace_back(&RC); in getMatchingSubClassWithSubRegs()
1069 for (auto &RC: RegClasses) { in getMatchingSubClassWithSubRegs() local
1071 RC.getSuperRegClasses(SubIdx, SuperRegClassesBV); in getMatchingSubClassWithSubRegs()
1073 SuperRegClasses.push_back(std::make_pair(&RC, SuperRegClassesBV)); in getMatchingSubClassWithSubRegs()
1127 for (CodeGenRegisterClass *RC : FindI->second) in getSuperRegClasses()
1128 Out.set(RC->EnumValue); in getSuperRegClasses()
1211 for (Record *RC : TupRegs) in CodeGenRegBank()
1212 getReg(RC); in CodeGenRegBank()
1279 CodeGenRegisterClass &RC = RegClasses.back(); in CodeGenRegBank() local
1280 if (!RC.Artificial) in CodeGenRegBank()
1281 addToMaps(&RC); in CodeGenRegBank()
1290 for (auto &RC : RegClasses) in CodeGenRegBank() local
1291 RC.EnumValue = i++; in CodeGenRegBank()
1331 void CodeGenRegBank::addToMaps(CodeGenRegisterClass *RC) { in addToMaps() argument
1332 if (Record *Def = RC->getDef()) in addToMaps()
1333 Def2RC.insert(std::make_pair(Def, RC)); in addToMaps()
1337 CodeGenRegisterClass::Key K(*RC); in addToMaps()
1338 Key2RC.insert(std::make_pair(K, RC)); in addToMaps()
1343 CodeGenRegBank::getOrCreateSubClass(const CodeGenRegisterClass *RC, in getOrCreateSubClass() argument
1347 CodeGenRegisterClass::Key K(Members, RC->RSI); in getOrCreateSubClass()
1359 if (CodeGenRegisterClass *RC = Def2RC.lookup(Def)) in getRegClass() local
1360 return RC; in getRegClass()
1978 for (auto &RC : RegClasses) { in computeRegUnitSets() local
1979 if (!RC.Allocatable || RC.Artificial || !RC.GeneratePressureSet) in computeRegUnitSets()
1984 RegUnitSets.back().Name = RC.getName(); in computeRegUnitSets()
1987 RC.buildRegUnitSet(*this, RegUnitSets.back().Units); in computeRegUnitSets()
2082 for (auto &RC : RegClasses) { in computeRegUnitSets() local
2084 if (!RC.Allocatable) in computeRegUnitSets()
2089 RC.buildRegUnitSet(*this, RCRegUnits); in computeRegUnitSets()
2095 LLVM_DEBUG(dbgs() << "RC " << RC.getName() << " Units:\n"; in computeRegUnitSets()
2109 assert((!RegClassUnitSets[RCIdx].empty() || !RC.GeneratePressureSet) && in computeRegUnitSets()
2195 for (CodeGenRegisterClass &RC : RegClasses) { in computeDerivedInfo()
2196 RC.HasDisjunctSubRegs = false; in computeDerivedInfo()
2197 RC.CoveredBySubRegs = true; in computeDerivedInfo()
2198 for (const CodeGenRegister *Reg : RC.getMembers()) { in computeDerivedInfo()
2199 RC.HasDisjunctSubRegs |= Reg->HasDisjunctSubRegs; in computeDerivedInfo()
2200 RC.CoveredBySubRegs &= Reg->CoveredBySubRegs; in computeDerivedInfo()
2228 void CodeGenRegBank::inferCommonSubClass(CodeGenRegisterClass *RC) { in inferCommonSubClass() argument
2234 CodeGenRegisterClass *RC1 = RC; in inferCommonSubClass()
2268 void CodeGenRegBank::inferSubClassWithSubReg(CodeGenRegisterClass *RC) { in inferSubClassWithSubReg() argument
2276 for (const auto R : RC->getMembers()) { in inferSubClassWithSubReg()
2299 if (I->second.size() == RC->getMembers().size()) { in inferSubClassWithSubReg()
2300 RC->setSubClassWithSubReg(&SubIdx, RC); in inferSubClassWithSubReg()
2305 getOrCreateSubClass(RC, &I->second, in inferSubClassWithSubReg()
2306 RC->getName() + "_with_" + I->first->getName()); in inferSubClassWithSubReg()
2307 RC->setSubClassWithSubReg(&SubIdx, SubRC); in inferSubClassWithSubReg()
2318 void CodeGenRegBank::inferMatchingSuperRegClass(CodeGenRegisterClass *RC, in inferMatchingSuperRegClass() argument
2329 if (RC->getSubClassWithSubReg(&SubIdx) != RC) in inferMatchingSuperRegClass()
2335 for (const auto Super : RC->getMembers()) { in inferMatchingSuperRegClass()
2370 if (SubSetVec.size() == RC->getMembers().size()) { in inferMatchingSuperRegClass()
2371 SubRC.addSuperRegClass(&SubIdx, RC); in inferMatchingSuperRegClass()
2377 getOrCreateSubClass(RC, &SubSetVec, RC->getName() + "_with_" + in inferMatchingSuperRegClass()
2400 CodeGenRegisterClass *RC = &*I; in computeInferredRegisterClasses() local
2401 if (RC->Artificial) in computeInferredRegisterClasses()
2405 inferSubClassWithSubReg(RC); in computeInferredRegisterClasses()
2408 inferCommonSubClass(RC); in computeInferredRegisterClasses()
2411 inferMatchingSuperRegClass(RC); in computeInferredRegisterClasses()
2438 for (const auto &RC : getRegClasses()) { in getRegClassForRegister() local
2439 if (!RC.contains(Reg)) in getRegClassForRegister()
2445 FoundRC = &RC; in getRegClassForRegister()
2450 if (RC.getValueTypes() != FoundRC->getValueTypes()) in getRegClassForRegister()
2456 if (RC.hasSubClass(FoundRC)) { in getRegClassForRegister()
2457 FoundRC = &RC; in getRegClassForRegister()
2464 if (FoundRC->hasSubClass(&RC)) in getRegClassForRegister()
2479 for (const auto &RC : getRegClasses()) { in getMinimalPhysRegClass() local
2480 if ((!VT || RC.hasType(*VT)) && in getMinimalPhysRegClass()
2481 RC.contains(Reg) && (!BestRC || BestRC->hasSubClass(&RC))) in getMinimalPhysRegClass()
2482 BestRC = &RC; in getMinimalPhysRegClass()