Lines Matching refs:fpu
9339 static void Print_x86_float_state_t(MachO::x86_float_state64_t &fpu) { in Print_x86_float_state_t() argument
9340 outs() << "\t fpu_reserved[0] " << fpu.fpu_reserved[0]; in Print_x86_float_state_t()
9341 outs() << " fpu_reserved[1] " << fpu.fpu_reserved[1] << "\n"; in Print_x86_float_state_t()
9342 outs() << "\t control: invalid " << fpu.fpu_fcw.invalid; in Print_x86_float_state_t()
9343 outs() << " denorm " << fpu.fpu_fcw.denorm; in Print_x86_float_state_t()
9344 outs() << " zdiv " << fpu.fpu_fcw.zdiv; in Print_x86_float_state_t()
9345 outs() << " ovrfl " << fpu.fpu_fcw.ovrfl; in Print_x86_float_state_t()
9346 outs() << " undfl " << fpu.fpu_fcw.undfl; in Print_x86_float_state_t()
9347 outs() << " precis " << fpu.fpu_fcw.precis << "\n"; in Print_x86_float_state_t()
9349 if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_24B) in Print_x86_float_state_t()
9351 else if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_53B) in Print_x86_float_state_t()
9353 else if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_64B) in Print_x86_float_state_t()
9356 outs() << fpu.fpu_fcw.pc << " "; in Print_x86_float_state_t()
9358 if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_NEAR) in Print_x86_float_state_t()
9360 else if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_DOWN) in Print_x86_float_state_t()
9362 else if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_UP) in Print_x86_float_state_t()
9364 else if (fpu.fpu_fcw.rc == MachO::x86_FP_CHOP) in Print_x86_float_state_t()
9367 outs() << "\t status: invalid " << fpu.fpu_fsw.invalid; in Print_x86_float_state_t()
9368 outs() << " denorm " << fpu.fpu_fsw.denorm; in Print_x86_float_state_t()
9369 outs() << " zdiv " << fpu.fpu_fsw.zdiv; in Print_x86_float_state_t()
9370 outs() << " ovrfl " << fpu.fpu_fsw.ovrfl; in Print_x86_float_state_t()
9371 outs() << " undfl " << fpu.fpu_fsw.undfl; in Print_x86_float_state_t()
9372 outs() << " precis " << fpu.fpu_fsw.precis; in Print_x86_float_state_t()
9373 outs() << " stkflt " << fpu.fpu_fsw.stkflt << "\n"; in Print_x86_float_state_t()
9374 outs() << "\t errsumm " << fpu.fpu_fsw.errsumm; in Print_x86_float_state_t()
9375 outs() << " c0 " << fpu.fpu_fsw.c0; in Print_x86_float_state_t()
9376 outs() << " c1 " << fpu.fpu_fsw.c1; in Print_x86_float_state_t()
9377 outs() << " c2 " << fpu.fpu_fsw.c2; in Print_x86_float_state_t()
9378 outs() << " tos " << fpu.fpu_fsw.tos; in Print_x86_float_state_t()
9379 outs() << " c3 " << fpu.fpu_fsw.c3; in Print_x86_float_state_t()
9380 outs() << " busy " << fpu.fpu_fsw.busy << "\n"; in Print_x86_float_state_t()
9381 outs() << "\t fpu_ftw " << format("0x%02" PRIx32, fpu.fpu_ftw); in Print_x86_float_state_t()
9382 outs() << " fpu_rsrv1 " << format("0x%02" PRIx32, fpu.fpu_rsrv1); in Print_x86_float_state_t()
9383 outs() << " fpu_fop " << format("0x%04" PRIx32, fpu.fpu_fop); in Print_x86_float_state_t()
9384 outs() << " fpu_ip " << format("0x%08" PRIx32, fpu.fpu_ip) << "\n"; in Print_x86_float_state_t()
9385 outs() << "\t fpu_cs " << format("0x%04" PRIx32, fpu.fpu_cs); in Print_x86_float_state_t()
9386 outs() << " fpu_rsrv2 " << format("0x%04" PRIx32, fpu.fpu_rsrv2); in Print_x86_float_state_t()
9387 outs() << " fpu_dp " << format("0x%08" PRIx32, fpu.fpu_dp); in Print_x86_float_state_t()
9388 outs() << " fpu_ds " << format("0x%04" PRIx32, fpu.fpu_ds) << "\n"; in Print_x86_float_state_t()
9389 outs() << "\t fpu_rsrv3 " << format("0x%04" PRIx32, fpu.fpu_rsrv3); in Print_x86_float_state_t()
9390 outs() << " fpu_mxcsr " << format("0x%08" PRIx32, fpu.fpu_mxcsr); in Print_x86_float_state_t()
9391 outs() << " fpu_mxcsrmask " << format("0x%08" PRIx32, fpu.fpu_mxcsrmask); in Print_x86_float_state_t()
9394 Print_mmst_reg(fpu.fpu_stmm0); in Print_x86_float_state_t()
9396 Print_mmst_reg(fpu.fpu_stmm1); in Print_x86_float_state_t()
9398 Print_mmst_reg(fpu.fpu_stmm2); in Print_x86_float_state_t()
9400 Print_mmst_reg(fpu.fpu_stmm3); in Print_x86_float_state_t()
9402 Print_mmst_reg(fpu.fpu_stmm4); in Print_x86_float_state_t()
9404 Print_mmst_reg(fpu.fpu_stmm5); in Print_x86_float_state_t()
9406 Print_mmst_reg(fpu.fpu_stmm6); in Print_x86_float_state_t()
9408 Print_mmst_reg(fpu.fpu_stmm7); in Print_x86_float_state_t()
9410 Print_xmm_reg(fpu.fpu_xmm0); in Print_x86_float_state_t()
9412 Print_xmm_reg(fpu.fpu_xmm1); in Print_x86_float_state_t()
9414 Print_xmm_reg(fpu.fpu_xmm2); in Print_x86_float_state_t()
9416 Print_xmm_reg(fpu.fpu_xmm3); in Print_x86_float_state_t()
9418 Print_xmm_reg(fpu.fpu_xmm4); in Print_x86_float_state_t()
9420 Print_xmm_reg(fpu.fpu_xmm5); in Print_x86_float_state_t()
9422 Print_xmm_reg(fpu.fpu_xmm6); in Print_x86_float_state_t()
9424 Print_xmm_reg(fpu.fpu_xmm7); in Print_x86_float_state_t()
9426 Print_xmm_reg(fpu.fpu_xmm8); in Print_x86_float_state_t()
9428 Print_xmm_reg(fpu.fpu_xmm9); in Print_x86_float_state_t()
9430 Print_xmm_reg(fpu.fpu_xmm10); in Print_x86_float_state_t()
9432 Print_xmm_reg(fpu.fpu_xmm11); in Print_x86_float_state_t()
9434 Print_xmm_reg(fpu.fpu_xmm12); in Print_x86_float_state_t()
9436 Print_xmm_reg(fpu.fpu_xmm13); in Print_x86_float_state_t()
9438 Print_xmm_reg(fpu.fpu_xmm14); in Print_x86_float_state_t()
9440 Print_xmm_reg(fpu.fpu_xmm15); in Print_x86_float_state_t()
9445 outs() << format("%02" PRIx32, fpu.fpu_rsrv4[f * g]) << " "; in Print_x86_float_state_t()
9448 outs() << "\t fpu_reserved1 " << format("0x%08" PRIx32, fpu.fpu_reserved1); in Print_x86_float_state_t()