316   if ((ISD == ISD::SDIV || ISD == ISD::SREM) &&  in getArithmeticInstrCost()
326     if (ISD == ISD::SREM) {  in getArithmeticInstrCost()
398     { ISD::SREM, MVT::v16i32, {  8 } }, // pmuludq+mul+sub sequence  in getArithmeticInstrCost()
439     { ISD::SREM, MVT::v8i32, {  8 } }, // pmuludq+mul+sub sequence  in getArithmeticInstrCost()
480     { ISD::SREM, MVT::v8i32, { 18 } }, // 2*pmuludq+mul+sub sequence + split.  in getArithmeticInstrCost()
511     { ISD::SREM, MVT::v4i32, {  8 } }, // pmuludq+mul+sub sequence  in getArithmeticInstrCost()
526     { ISD::SREM, MVT::v64i8,  { 16 } }, // 2*ext+2*pmulhw+mul+sub sequence  in getArithmeticInstrCost()
531     { ISD::SREM, MVT::v32i16, {  8 } }, // vpmulhw+mul+sub sequence  in getArithmeticInstrCost()
544     { ISD::SREM, MVT::v64i8,  { 32 } }, // 4*ext+4*pmulhw+mul+sub sequence  in getArithmeticInstrCost()
549     { ISD::SREM, MVT::v32i16, { 16 } }, // 2*vpmulhw+mul+sub sequence  in getArithmeticInstrCost()
554     { ISD::SREM, MVT::v16i32, { 17 } }, // vpmuldq+mul+sub sequence  in getArithmeticInstrCost()
567     { ISD::SREM, MVT::v32i8,  { 16 } }, // 2*ext+2*pmulhw+mul+sub sequence  in getArithmeticInstrCost()
572     { ISD::SREM, MVT::v16i16, {  8 } }, // vpmulhw+mul+sub sequence  in getArithmeticInstrCost()
577     { ISD::SREM, MVT::v8i32,  { 19 } }, // vpmuldq+mul+sub sequence  in getArithmeticInstrCost()
589     { ISD::SREM, MVT::v32i8,  { 34 } }, // 4*ext+4*pmulhw+mul+sub sequence + split.  in getArithmeticInstrCost()
594     { ISD::SREM, MVT::v16i16, { 18 } }, // 2*pmulhw+mul+sub sequence + split.  in getArithmeticInstrCost()
599     { ISD::SREM, MVT::v8i32,  { 38 } }, // vpmuludq+mul+sub sequence  in getArithmeticInstrCost()
611     { ISD::SREM, MVT::v4i32,  { 20 } }, // vpmuludq+mul+sub sequence  in getArithmeticInstrCost()
622     { ISD::SREM, MVT::v16i8,  { 16 } }, // 2*ext+2*pmulhw+mul+sub sequence  in getArithmeticInstrCost()
627     { ISD::SREM, MVT::v8i16,  {  8 } }, // pmulhw+mul+sub sequence  in getArithmeticInstrCost()
632     { ISD::SREM, MVT::v4i32,  { 24 } }, // pmuludq+mul+sub sequence  in getArithmeticInstrCost()
1433       (ISD == ISD::SDIV || ISD == ISD::SREM || ISD == ISD::UDIV ||  in getArithmeticInstrCost()