Lines Matching refs:SDIV

316   if ((ISD == ISD::SDIV || ISD == ISD::SREM) &&  in getArithmeticInstrCost()
397 { ISD::SDIV, MVT::v16i32, { 6 } }, // pmuludq sequence in getArithmeticInstrCost()
438 { ISD::SDIV, MVT::v8i32, { 6 } }, // pmuludq sequence in getArithmeticInstrCost()
479 { ISD::SDIV, MVT::v8i32, { 14 } }, // 2*pmuludq sequence + split. in getArithmeticInstrCost()
510 { ISD::SDIV, MVT::v4i32, { 6 } }, // pmuludq sequence in getArithmeticInstrCost()
525 { ISD::SDIV, MVT::v64i8, { 14 } }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
530 { ISD::SDIV, MVT::v32i16, { 6 } }, // vpmulhw sequence in getArithmeticInstrCost()
543 { ISD::SDIV, MVT::v64i8, { 28 } }, // 4*ext+4*pmulhw sequence in getArithmeticInstrCost()
548 { ISD::SDIV, MVT::v32i16, { 12 } }, // 2*vpmulhw sequence in getArithmeticInstrCost()
553 { ISD::SDIV, MVT::v16i32, { 15 } }, // vpmuldq sequence in getArithmeticInstrCost()
566 { ISD::SDIV, MVT::v32i8, { 14 } }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
571 { ISD::SDIV, MVT::v16i16, { 6 } }, // vpmulhw sequence in getArithmeticInstrCost()
576 { ISD::SDIV, MVT::v8i32, { 15 } }, // vpmuldq sequence in getArithmeticInstrCost()
588 { ISD::SDIV, MVT::v32i8, { 30 } }, // 4*ext+4*pmulhw sequence + split. in getArithmeticInstrCost()
593 { ISD::SDIV, MVT::v16i16, { 14 } }, // 2*pmulhw sequence + split. in getArithmeticInstrCost()
598 { ISD::SDIV, MVT::v8i32, { 32 } }, // vpmuludq sequence in getArithmeticInstrCost()
610 { ISD::SDIV, MVT::v4i32, { 15 } }, // vpmuludq sequence in getArithmeticInstrCost()
621 { ISD::SDIV, MVT::v16i8, { 14 } }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
626 { ISD::SDIV, MVT::v8i16, { 6 } }, // pmulhw sequence in getArithmeticInstrCost()
631 { ISD::SDIV, MVT::v4i32, { 19 } }, // pmuludq sequence in getArithmeticInstrCost()
1433 (ISD == ISD::SDIV || ISD == ISD::SREM || ISD == ISD::UDIV || in getArithmeticInstrCost()